Mentor Graphics has developed MIPI-protocol verification IP for their latest-generation Veloce hardware emulation platform. The Mentor MIPI VIP solution enables engineers to exhaustively stress test a device-under-test (DUT) that includes one or more MIPI protocol interfaces on their SoC, and run verification cycles at orders of magnitude faster than simulation.
Mentor Graphics has added cache coherent interconnect subsystem verification to the Questa and Veloce platforms. ARM AMBA 5 CHI and AMBA 4 ACE specifications enable high performance, coherent SoC design functionality to be at the heart of the Questa and Veloce platforms. The Questa and Veloce platform AMBA 4 ACE verification solutions are available now. The AMBA 5 CHI verification solutions are available to approved ARM AMBA 5 CHI licensees.
Mentor Graphics introduced a comprehensive IP to System, UPF-based low-power verification flow. Mentor now has platform-level support of Unified Power Format in both the Questa functional verification platform and the Veloce family of hardware emulators that lets users create a single specification for power intent that is reusable and consistent, and facilitates low-power verification across simulation, formal and emulation.
Mentor Graphics introduced a set of protocol transactors for use with the Veloce hardware emulation platform. The Veloce transactors help engineers to stress-test a DUT that includes one or more protocol interfaces on the SoC at orders of magnitude faster than simulation. The protocol transactors can be used with both transaction-based acceleration and traditional In-Circuit (ICE) modes of operation. The Veloce transactors is available now for deployment.
According to Mentor Graphics, their Questa and Veloce functional verification platforms have expanded their support for designs based on the latest ARM Cortex processors and AMBA bus interfaces. The Questa Codelink with support for ARM Cortex A7, Cortex A15, other Cortex A-family, Cortex R-family, and Cortex M-family processors and Questa Verification IP with support for AMBA4 ACE are available now.
Mentor Graphics introduced emulation solutions to accelerate the verification of Universal Serial Bus (USB) SuperSpeed (3.0) products. The hardware and software solutions enable engineers to test USB SuperSpeed peripheral devices integrated on System-on-Chip (SoC) designs, and to develop and test their software drivers and firmware prior to silicon being available. The solution is available now for deployment.
Mentor Graphics and MoreThanIP teamed together on emulation solutions for the verification of Multi-Gigabit Ethernet Systems-on-Chips (SoCs). Their solution combines Mentor Veloce hardware emulation technology and the iSolve application solutions with MoreThanIP’s Ethernet 40G/100G MAC/PCS IP Cores. Mentor Graphics is a leader in advanced system verification solutions. MoreThanIP is a leader in delivery of IP products for high-speed communications, serial backplanes, and embedded system technologies.
Mentor Graphics introduced their next-generation platform to accelerate the verification of 100-Gigabit Ethernet products. The platform features the Veloce family of emulation products and the iSolve Ethernet Switch solution. The Mentor platform enables network equipment designers to test complete systems, including software and hardware, and employ real-world network traffic early in the development cycle. The solution is available now for deployment.
Mentor Graphics launched their 3D TV Multimedia Verification Platform. The multimedia platform enables designers to develop and test the software against multiple 3D TV formats on their systems-on-chip (SoC) before silicon is available. The 3D TV verification platform supports the latest HDMI and other digital TV standards. The solution consists of the Veloce family of emulators and the iSolve Multimedia product for HTDV and HDMI 3D applications. The Mentor 3D TV multimedia platform is available now.
Mentor Graphics introduced the iSolve USB Peripheral. The hardware-assisted solution accelerates the verification of Universal Serial Bus (USB) 2.0 products, including hard disk drives and other mass storage devices. iSolve USB Peripheral enables designers to test the System-on-Chip (SoC) design that controls a hard disk drive or similar mass storage device, by providing an accurate, hardware-based model of the real disk drive connected to their SoC.