Tag Archives: uMCTL2

Synopsys Enhanced DesignWare Universal DDR Memory Controller

Synopsys enhanced their DesignWare Universal DDR Memory Controller (uMCTL2). The enhanced version offers up to 30% lower latency and up to 15% higher throughput than the previous generation controller. The enhanced uMCTL combines the previous-generation DesignWare Universal DDR memory controller with the the Intelli architecture acquired from Virage Logic. The enhanced version of the DesignWare Universal DDR Memory Controller single-port configuration will be available next month.

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