Tag Archives: Tool Suite

Corelis Rolls Out Boundary-Scan Tool Suite v7.8

Corelis released a new version of their ScanExpress Boundary-Scan Tool Suite. Version 7.8 of the tool features improved cluster testing support, intelligent BSDL file handling, and a new model-based test coverage. The new version also expands JTAG Embedded Test (JET) support to Texas Instruments AM335x Sitara processors. Current Corelis customers that have a valid maintenance contract can now access the new version 7.8 CD through the Corelis support website.

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SynaptiCAD Timing Diagram Editors Support Synopsys Design Constraint Files

SynaptiCAD has released new versions of their timing diagram editing tools that can create and edit Synopsys Design Constraint (SDC) files using data from timing diagrams. This capability makes creation of SDC files quicker and less error prone and also gives designers the ability to visualize the timing constraints.

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Corelis Introduces ScanExpress Boundary-Scan Tool Suite v7.7

Corelis launched version 7.7 of their ScanExpress Boundary-Scan Tool Suite. The latest version of the tool suite features improved constraints handling, support for multi-core devices, and new JTAG Embedded Test support for additional Freescale and Texas Instruments processors. ScanExpress Boundary-Scan Tool Suite, version 7.7 is available now to customers with a valid maintenance contract.

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Mentor Graphics Releases HyperLynx v8.2 Tool Suite

Mentor Graphics rolled out HyperLynx release 8.2. HyperLynx is a suite of analysis tools for optimizing printed circuit board (PCB) designs. New features include 3D full-wave field solving, and integrated thermal/power co-simulation analysis capabilities. Specialized 3D modeling is required for analysis of multi-GHz SERDES channel interconnects (such as PCIe-Gen 3). The Mentor HyperLynx v8.2 tool suite will ship in volume next month.

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Corelis ScanExpress Boundary-Scan Tool Suite CD Version 7.6

Corelis rolled out version 7.6 of their ScanExpress Boundary-Scan Tool Suite. The new Version 7.6 CD is the first test tool to include JTAG embedded test (JET) support for AMD Family 10 processors. As a result, ScanExpress v7.6 can perform processor emulation-based testing on AMD ASB2 (BGA), Opteron 4100, and Quad-Core Opteron CPUs. The new Version 7.6 CD is available now.

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Corelis ScanExpress Boundary-Scan Tool Suite, Version 7.5

Corelis introduced version 7.5 of their ScanExpress Boundary-Scan Tool Suite. The latest version features automatic identification and classification of resistors and capacitors involved in IEEE-1149.6 high speed, AC-coupled, and differential circuits. ScanExpress TPG v7.5 accelerates IEEE-1149.6 test development. The Corelis tool is available now for engineers with a valid maintenance contract.

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Freescale CodeWarrior Development Studio for Microcontrollers v10.0

Freescale Semiconductor introduced CodeWarrior 10.0 integrated development environment (IDE). CodeWarrior 10 IDE is based on open-source Eclipse technology. CodeWarrior is a tool suite for code development, debug and test when designing with Freescale’s extensive range of microcontroller (MCU) and microprocessor (MPU) solutions.

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Geensoft Reqtify 2010 Tool Suite

Geensoft introduced Reqtify 2010 tool suite for the automated management of embedded hardware and software requirements capture, traceability and impact analysis throughout the entire development lifecycle. Reqtify 2010 offers improved productivity through an extensive range of new and enhanced plug-in tools, features and interfaces. Reqtify has been deployed or qualified for application development under certification constraints like DO178C, DO254, EN50128, IEC 61508, ISO26262, FDA 21CFR Part 11, MODAF, and DoDAF.

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LDRA Tool Suite Integrates with IAR Embedded Workbench

The LDRA tool suite has integrated with IAR Embedded Workbench for the PIC18, AVR, AVR32, and MSP430 microcontrollers. IAR Embedded Workbench provides full ANSI C compliance, support for embedded C++, and host-controlled I/O facilities. LDRA leverages the capabilities to add static analysis, code coverage to Modified Condition/Decision Coverage (MC/DC), and requirement traceability on these resource-constrained footprints.

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