Tag Archives: Tanner EDA

Seminar: Image Sensors and High Speed Analog Mixed-Signal Design

Tanner EDA announced a seminar for next week. The title of the event is Driving Innovation in Image Sensors and High Speed Analog/Mixed-Signal Design. The Lunch & Learn seminar will be moderated by SemiWiki founder Dan Nenni and will discuss the challenges and opportunities for improving productivity in analog and mixed-signal (A/MS) IC design. The seminar will take place on Thursday, October 24th, at TechMart in Santa Clara, California.

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3D Solid Modeling and Analysis Webinar

Tanner EDA will host a webinar about 3D solid modeling and analysis. The webcast will demonstrate a 3D solid modeling and analysis capability that may be used for the design of MEMS and integrated MEMS-IC devices, their associated electronics and packaging in commercial MEMS systems. The online seminar will take place Tuesday, September 24th, 2013 from 8:30am to 9:30am Pacific time.

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Tanner HiPer Silicon v15.23 Features HiPer Simulation AFS and T-AFS

Tanner EDA's S-Edit design environment for schematic capture

Tanner EDA introduced the latest version of HiPer Silicon full-flow analog and mixed-signal design suite. HiPer Silicon v15.23 includes HiPer Simulation AFS and Tanner Analog FastSPICE (T-AFS), which integrates the Berkeley Design Automation Analog FastSPICE Platform with Tanner EDA’s S-Edit schematic capture and W-Edit waveform analyzer.

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Tanner Analog FastSPICE Features Berkeley Design Automation AFS

Tanner EDA introduced Tanner Analog FastSPICE (T-AFS), which adds Berkeley Design Automation Analog FastSPICE Platform to Tanner EDA’s full-flow HiPer Silicon design suite. With the availability of Analog FastSPICE as an add-on to Tanner EDA’s analog and mixed-signal design tools, RF designers can realize the benefits of Tanner EDA’s full-flow analog design suite. Analog FastSPICE enables verification of very complex analog/ RF circuits with nanometer SPICE-accurate results.

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HiPer Simulation A/MS Features Tools from Tanner EDA, Aldec

Tanner EDA and Aldec teamed together on HiPer Simulation A/MS, which is an integrated co-simulation solution for analog and mixed-signal (A/MS) design. HiPer Simulation A/MS includes Tanner EDA’s T-Spice analog design capture and simulation tool, and Aldec’s Riviera-PRO mixed language digital simulator. The integrated solution helps both analog and digital designers to seamlessly resolve A/MS verification problems from one cohesive, integrated platform. HiPer Simulation A/MS is available on both Windows and Linux.

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Tanner EDA and SoftMEMS Host MEMS Co-Design Webinar

Tanner EDA and SoftMEMS are hosting a webinar about eliminating bottlenecks in MEMS-IC co-design. The online seminar will take place April 10th at 8:30am Pacific time (11:30am Eastern time). The webcast will feature a presentation, demonstration, and live Q&A session. Tanner EDA provide tools for the design, layout and verification of analog and mixed-signal integrated circuits (ICs) and MEMS devices. SoftMEMS provides the CAD design environment used for the development and test of MEMS products.

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Tanner EDA HiPer Silicon v15.11

Tanner EDA rolled out version 15.11 of HiPer Silicon design suite. HiPer Silicon offers engineers a complete analog design flow from schematic capture, circuit simulation, and waveform probing to physical layout and verification. New features in HiPer Silicon v15.11 includes S-Edit additions, T-Spice performance improvements, W-Edit enhancements, L-Edit productivity gains, HiPer DevGen additions, and HiPer Verify enhancements.

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Tanner EDA to Host Three Webinars

Tanner EDA announced three webcasts for April. The HiPer Verify webinar will take place April 5th and will explain how to the HiPer Verify DRC/ LVS tool to run verification throughout the design cycle to ensure error-free and timely tapeouts. The L-Edit webinar will take place on April 14th and show how to use L-Edit to reduce the unpredictable costs and workload related to a tapeout deadline. The HiPer DevGen webinar will take place April 21st and will demonstrate how to reduce weeks of design time into minutes for current mirrors, differential pairs, and/or resistor arrays in analog designs.

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Tanner EDA HiPer Silicon v15 Design Suite

Tanner EDA announced version 15 of the HiPer Silicon design suite. HiPer Silicon v15 gives designers a complete analog design flow from schematic capture, circuit simulation, and waveform probing to physical layout and verification. HiPer Silicon v15 full-flow design suite is available now for the Windows operating system. A Linux version will be available later.

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Tanner EDA and SDT Process Design Kits for Thin Film Technologies

Tanner EDA and Sound Design Technologies (SDT) have teamed together to develop process design kits (PDKs) for analog/mixed-signal (A/MS) designers using Tanner EDA’s HiPer Silicon software. Sound Design Technologies’ PDKs for Tanner Tools will be available this quarter.

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