ASSET InterTech has published an introductory tutorial on IJTAG. The tutorial explains how the new IEEE P1687 Internal JTAG (IJTAG) standard simplifies and automates the way chip designers manage embedded instruments that perform chip validation and characterization. The article describes the on-chip IJTAG architecture and the two languages defined by the standard, Instrument Connectivity Language (ICL) and Procedural Description Language (PDL). ICL defines the connections among embedded on-chip instruments and PDL is an extension of the Tcl (Tool Command Language) for developing validation, test and debug vectors for execution by IJTAG instruments.
The IEEE approved the new IEEE 1685 standard (Standard for IP-XACT, Standard Structure for Packaging, Integrating and Re-Using IP Within Tool-Flows). IEEE 1685 will enable the creation and exchange of Intellectual Property blocks in a highly automated design environment. Until now there has been no standard description of IP blocks, which has made their use both difficult and prone to error. The IEEE 1685 standard will help solve this problem.