Tag Archives: SOI Industry Consortium

Fully Depleted Workshop Covers Fully Depleted SOI Technology

The SOI Industry Consortium, CEA-Leti and Soitec are organizing a workshop on fully depleted silicon-on-insulator (FD-SOI) technology for advanced semiconductor architectures. The forum, which includes technical presentations and discussions, will take place in San Francisco, California on February 24, 2012. The event provides semiconductor IC designers and manufacturers with the latest information and insights on using FD-SOI wafers to produce more power efficient ICs at the performance required for applications in mobile and consumer electronics.

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SOI Design Clinic at ARM TechCon3

The SOI Industry Consortium is offering a silicon on insulator (SOI) educational event at ARM TechCon3. The SOI Design Clinic will provide IC designers and engineering management with a technical understanding of significant differences between designing on SOI versus bulk silicon, and how to receive the power-saving, integration, reliability and performance advantages of SOI. Experts from the semiconductor industry will deliver training and share their insights to help attendees evaluate and plan their move to SOI.

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