Tensilica introduced their ConnX BBE32UE digital signal processor IP core. The ConnX BBE32UE DSP core is ideal for baseband SOC (system-on-chip) designs. Coupled with Tensilica Baseband Dataplane processors (DPUs), the new core can help engineers realize a fully software programmable, flexible modem for LTE-Advanced user equipment category 7 PHY (Layer 1) in less than 200mW (28 nm HPL process). The ConnX BBE32UE is available now for early access customers. General product release is planned for the third quarter of 2012.
Cadence Design Systems expanded its Flash IP offering to include support for the Open NAND Flash Interface (ONFI) 3.0 specification. According to Cadence, it is the first company to provide a combined ONFI 3 controller and PHY IP solution. The enhanced Flash IP streamlines SoC and system design while ensuring an optimized ONFI 3 implementation for maximum performance. The Cadence ONFI 3 memory controller and PHY IP are available now. The EDA company is also offering supporting verification IP (VIP) and memory models to ensure successful implementation.
Synopsys introduced the DesignWare DDR multiPHY. The IP solutions are mixed-signal PHY IP Cores that supply the complete physical interface to JEDEC standard DDR3, DDR3L (1.35V DDR3), DDR3U (1.2xV DDR3), DDR2, Mobile DDR and LPDDR2 SDRAM Memories up to 1066Mbps data rates. Synopsys DesignWare DDR multiPHY IP solutions are designed to support a broad range of DDR SDRAM standards in a single PHY without sacrificing power consumption or silicon area. The DesignWare DDR multiPHY is available now.
Synopsys introduced the DesignWare High-Definition Multimedia Interface (HDMI) 1.4 transmitter (Tx) and receiver (Rx) digital controllers and PHY IP solutions that are compliant to the standard specification. The DesignWare HDMI IP enables designers to quickly incorporate differentiated functionality into digital TV (DTV) and home theater applications with less risk and improved time-to-market. The DesignWare HDMI 1.4 Tx and Rx IP solution is available now. The HDMI PHY IP is available in more than 10 process technologies from 90-nanometers (nm) to 40-nm, and from leading foundries.