Avery Design Systems recently introduced their SCSI-Xactor verification IP. SCSI-Xactor targets SCSI Express for high performance PCIe-based SSDs. Avery’s verification IP is a complete solution for SCSI Express core and system design. SCSI-Xactor helps design and verification engineers to quickly and extensively test the functionality of SCSI Express controller-based designs.
Cadence Design Systems has added new capabilities in their PCI Express Verification IP. The Cadence PCIe VIP now offers more in-depth verification of the most current PCI Express specification at both the block and system-on-chip (SoC) levels. The Cadence PCIe VIP is a broad, highly differentiated, and proven solution with distinct advantages for PCI Express verification. Cadence’s VIP solution includes over 40 interface protocols and more than 6,000 memory models that have been deployed in thousands of designs.
According to Synopsys, it is the first IP provider to support the final version of the PCI Express (PCIe) 3.0 base specification (version 1.0). DesignWare digital controllers for PCI Express now also support the latest PIPE 3.0 specification (v0.9), PCI-SIG Engineering Change Notifications (ECNs), 256-bit datapath and embedded DMA engine. Synopsys’ DesignWare IP for PCI Express 3.0 is available now.
The PCI Express Base 3.0 specification is now available to PCI-SIG members. The PCI Express Base 3.0 specification describes the PCI Express architecture, interconnect attributes, fabric management, and the programming interface required to design and build systems and peripherals that are compliant with the PCI Express Specification. PCIe 3.0 technology maintains backward compatibility with previous PCIe architectures and is ideal for high-volume platform I/O implementations across a wide range of topologies (servers, workstations, desktop and mobile personal computers, embedded systems, peripheral devices, etc).
ASSET’s ScanWorks platform for embedded instrumentation now supports the PLX visionPAK packet generator/system analyzer toolset. visionPAK provides unique capabilities embedded in PLX PCIe devices helping engineers with board level testing and field debug. ASSET ScanWorks support will enable system manufacturers to use PLX on-board devices to test other components and interconnects of the system more rigorously with lower cost before they get shipped.