Tag Archives: Parasitic-aware

Cadence Virtuoso IC 6.1.5 Webinar

Cadence Design Systems and ClioSoft is offering a webinar about the major new enhancements in Virtuoso IC 6.1.5. The webcast will explain how parasitic-aware design and HCM techniques can help accelerate time to market. The event is titled, Cadence Virtuoso (IC 6.1.5) Technologies, Parasitic-aware Design Flow and Design Management. The one-hour online seminar will take place Thursday, April 14th, 2011 at 11:00 am Pacific time. The webcast is ideal for CAD engineers/managers and analog, mixed-signal, custom IC design and layout engineers/managers.

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