Tag Archives: Nanometer

2011 Nanometer Circuit Verification Forum

The 2011 Nanometer Circuit Verification Forum will take place on September 22, 2011 in Santa Clara, California. The nanometer forum will present successful approaches to verifying analog, mixed-signal, and RF circuits implemented in 90nm to 28nm silicon. The all-day event is free, but registration is required. The Nanometer Circuit Verification Forum is hosted by Berkeley Design Automation. Other EDA companies supporting the event include Accelicon Technologies, Ciranova, Invarian, MunEDA, and Solido Design Automation.

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Berkeley Design Automation Analog FastSPICE RF

Berkeley Design Automation introduced Analog FastSPICE RF (AFS RF), which is the first true SPICE accurate device noise analysis for RF circuits. AFS RF accurately analyzes nanometer-scale device noise impact for all types of pre-layout and post-layout circuits, ensuring early insight into its impact on performance, power, and area. For complex circuits, Analog FastSPICE RF is 5 to 10 times faster than traditional RF tools that can only approximate device noise effects. It is available immediately.

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