Tag Archives: memory

Leti Workshop on Innovative Memory Technologies

Leti research center is hosting a workshop on innovative memory technologies at MINATEC during Minatec Crossroads ’10 events on Monday, June 21. The workshop will explore the latest achievements in semiconductor memory technologies. Topics will range from short-term to long-term memory solutions. The workshop is part of the 3rd Minatec Crossroads ’10 June 21-25. Leti, a CEA laboratory located in Grenoble, is one of the main European applied research centers in electronics.

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Variety MX for Embedded Memories Statistical Timing Model Generator

Variety MX, from Altos Design Automation, is a fast and accurate statistical timing model generator for embedded memories. Variety MX generates instance-specific Liberty models for use by Cadence’s Encounter Timing System GXL, Extreme DA’s Goldtimetm, and Synopsys PrimeTime VX. Variety MX is able to characterize memory sizes that cannot be adequately simulated using brute Monte Carlo methods or even with fast sampling techniques. Variety MX is available now.

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Emerging Technologies in Solid State Devices SEMATECH Workshop

The SEMATECH-led workshop, Emerging Technologies in Solid State Devices, will take place December 5-6, 2009. Technologists, executives, and faculty from across the semiconductor R&D community will present technical data revealing advances in emerging memory technologies, energy efficient devices, and high mobility channel transistors. The SEMATECH workshop will feature over 40 presentations and panel discussions on cutting-edge solutions to the technical and manufacturing challenges associated with emerging nanoelectronics technologies.

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SEMATECH to Reveal Device and Process Breakthroughs at IEDM

At the IEEE International Electron Devices Meeting (IEDM), engineers from SEMATECH’s Front End Processes (FEP) program will present technical papers revealing research breakthroughs. SEMATECH experts will report on low defect density high-k gate stacks for alternative III-V channel materials and non-planar devices, and discuss a new dry etch approach to minimize etch related leakage — a significant process technology advancement for next-generation logic and memory technologies. The IEDM Conference will take place December 7-9, 2009, at the Hilton in Baltimore, MD.

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