Tag Archives: Interfaces

ESD Design for High Speed Interfaces: Signal Integrity Considerations

NXP Semiconductors has an archived webinar about maintaining signal integrity when placing ESD devices on high speed differential signals. Topics covered in the webcast include: Capacitance, inductance, and methods of impedance matching, maintaining eye openings, and minimizing jitter and skew. During the online seminar, NXP will compare signal integrity challenges with different ESD solutions.

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ESD Design for High Speed Interfaces: Critical Design Considerations

NXP Semiconductors is offering a webinar, ESD Design for High Speed Interfaces: Critical Design Considerations, on Tuesday, December 8, 2009 11:00 am EST (8:00 am PST, 16:00 GMT). In the webcast, you will learn about design consideration for choosing ESD protection devices for high speed interface protection. The online seminar will cover comparisons of performance, other available solutions, layout techniques for improving overall performance, and recent advances in protection architectures.

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