Tag Archives: IEEE International Electron Devices Meeting

SEMATECH to Reveal Device and Process Breakthroughs at IEDM

At the IEEE International Electron Devices Meeting (IEDM), engineers from SEMATECH’s Front End Processes (FEP) program will present technical papers revealing research breakthroughs. SEMATECH experts will report on low defect density high-k gate stacks for alternative III-V channel materials and non-planar devices, and discuss a new dry etch approach to minimize etch related leakage — a significant process technology advancement for next-generation logic and memory technologies. The IEDM Conference will take place December 7-9, 2009, at the Hilton in Baltimore, MD.

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