ANSYS and Apache Design announced a series of free seminars about simulation software platforms and methodologies that meet integrated circuit (IC) power, performance and price demands for low-power mobile, high-performance computing, consumer and automotive electronics. The events will take place in Boston, Massachusetts; Santa Clara and Los Angeles, California; Austin, Texas.
Synopsys’ unified mixed-signal IC design solution has been qualified for TowerJazz’s power management analog/mixed-signal reference design flow (Reference Flow 2.0) and 180-nanometer (nm) Power Management (PM) interoperable process design kit (iPDK). Synopsys’ tool suite, the foundry iPDK and reference design flow are verified to seamlessly work together to enable designers to quickly become productive.
Apache Design announced four online seminars for this month. The webcasts will cover simulation software platforms and methodologies that meet integrated circuit (IC) power, performance and price demands for low-power mobile, high-performance computing, consumer and automotive electronics. The Apache Low Power Webinar Series will take place July 24, July 25, July 26, and July 31.
Magma Design Automation rolled out version 1.2 of their Talus integrated circuit implementation platform. Talus v1.2 features a runtime improvement of 40% and enhancing high-performance core design capabilities. Talus was architected to increase designer productivity, improve quality of results and reduce the development costs of advanced-node designs.
Mentor Graphics and Dongbu HiTek rolled out a series of Technology Design Kits (TDKs). The Technology Design Kits support Dongbu HiTek’s analog-intensive BCDMOS process technologies. The TDKs used with IC Station (Mentor’s Custom IC Design Flow solution) will seamlessly accelerate BCDMOS chip designs from system specifications to post-layout verifications.
Atrenta launched SpyGlass-Physical tool for early implementation analysis. SpyGlass-Physical provides early estimates of area, power, timing and routability for RTL designers without the need for physical design expertise or tools. The tool helps to achieve performance targets in concurrent block/SoC development processes by using interactive implementation analysis features. The result is enhanced guidance for the actual implementation of both IPs and full-chip SoCs. SpyGlass-Physical is currently in limited deployment.
IC Project Analyzer (ICPA), from Numetrics, is a tool for semiconductor product development teams that calculates schedule risk of newly planned IC projects and benchmarks performance of completed projects against the industry. IC Project Analyzer is based on the same core technology and industry database in Numetrics’ NMX-ERP tool suite that semiconductor and electronics companies use to plan and benchmark their IC and embedded software projects. ICPA is available as software-as-a-service (SaaS). For a limited time, the tool can be used free of charge.
Sonics and JEDA Technologies have an on-demand webinar for optimizating SoC performance. The webcast, System Optimization Techniques for Peak SoC Performance, is ideal for IC, system, and SoC designers working on next-generation silicon for advanced digital entertainment and mobile devices. The presenters are Ravi Chopra (Application Engineer, Sonics) and Andrea Kroll (VP of Marketing and Business Development, JEDA Technologies).
Synopsys and imec will collaborate to accelerate the development of 3D stacked IC technologies. Synopsys TCAD (Technology Computer-Aided Design) finite-element method tools will be used for characterizing and optimizing the reliability and electrical performance of through-silicon vias (TSVs). The collaboration will accelerate the development of 3D stacked IC technologies.
Tanner EDA and Sound Design Technologies (SDT) have teamed together to develop process design kits (PDKs) for analog/mixed-signal (A/MS) designers using Tanner EDA’s HiPer Silicon software. Sound Design Technologies’ PDKs for Tanner Tools will be available this quarter.