Tag Archives: HLS

Calypto to Host Webinars on High Level Synthesis and RTL Power Optimization

A Practical Comparison Between C++ and SystemC for High Level Synthesis Webinar

Calypto Design Systems will host two webinars next month. The online seminars will educate designers on the latest in high level synthesis (HLS) and power optimization techniques for RTL-based designs. The titles of the webcasts are Minimizing RTL Power through Sequential Analysis, and A Practical Comparison Between C++ and SystemC for High Level Synthesis.

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Forte Design Systems Launches New Version of Cynthesizer SystemC High-level Synthesis

Cynthesizer SystemC high-level synthesis (HLS) ~ Forte Design Systems

Forte Design Systems launched a new version of Cynthesizer SystemC high-level synthesis (HLS). Cynthesizer v4.3 features improvements in power results and ease of use while expanding their CynWare IP library. This enables design teams to quickly adopt high-level synthesis. New features include new modeling style support, expanded optimization and analysis capabilities, integration with third-party tools and improvements to CynWare intellectual property (IP) cores. Version 4.3 of Forte Cynthesizer is shipping now.

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