Tag Archives: HiPer DevGen

Tanner EDA to Host Three Webinars

Tanner EDA announced three webcasts for April. The HiPer Verify webinar will take place April 5th and will explain how to the HiPer Verify DRC/ LVS tool to run verification throughout the design cycle to ensure error-free and timely tapeouts. The L-Edit webinar will take place on April 14th and show how to use L-Edit to reduce the unpredictable costs and workload related to a tapeout deadline. The HiPer DevGen webinar will take place April 21st and will demonstrate how to reduce weeks of design time into minutes for current mirrors, differential pairs, and/or resistor arrays in analog designs.

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