Synopsys is offering 20nm process technology support for the TSMC 20nm Reference flow. The 20nm process offers measurable power, performance and area benefits. TSMC and Synopsys have collaborated closely from the very early stages of 20 nanometer process development to address the challenges of 20nm design. The results of this collaboration will help designers maximize the benefits of the 20nm process to deliver the designs predictably and on time.
TSMC has given Phase I Certification to Synopsys design implementation tools for TSMC’s 20nm process. Synopsys’ Galaxy Implementation Platform features comprehensive support for TSMC’s latest set of 20-nm design rules. The certified tools from TSMC’s Open Innovation Platform and its ecosystem members help engineers create products that meet aggressive power, performance and area targets.
Synopsys Galaxy Custom Designer now features SmartDRD design-rules-driven technology. SmartDRD technology enables layout engineers to more quickly achieve design-rule-check (DRC) clean designs with significantly reduced effort for analog and custom designs. SmartDRD automates many DRC repair tasks. Until now, custom layout has been primarily handled using manual methods. With SmartDRD technology, layout engineers can identify and fix DRC violations in just seconds.