Sigrity launched their XcitePI IO Interconnect Model Extraction and Assessment software. The tool provides accurate system-level analysis of high-speed channels and buses by generating precise chip IO power/ground and signal interconnect models. XcitePI IO Interconnect Model Extraction is available on Windows and Linux platforms. Prices start at $108,000 for a 3-year license. The new tool is part of Sigrity’s XcitePI chip-level analysis family that supports both pre- and post-layout design improvement.
Magma Design Automation introduced version 1.2 of Talus integrated circuit (IC) implementation solution. Talus v1.2 helps engineers to implement 1 million to 1.5 million cells per day on large designs or blocks of 2 million to 5 million cells – with crosstalk avoidance, advanced on-chip variation (AOCV) and multi-mode multi-corner (MMMC) analysis enabled. Talus is currently in use for complex 28nm designs. Talus 1.2 features faster, more accurate routing, timing and extraction technologies and advanced capabilities. It improves turnaround time by 5x to 6x.