EVE introduced the e-zTest MIPI CSI-2 and e-zTest MIPI DSI validation platforms. The new application-specific debug solutions support the Mobile Industry Processor Interface (MIPI) Alliance wireless standards for Camera Serial Interface (CSI-2) and Display Serial Interface (DSI). The two new wireless system-on-chip (SoC) validation platforms are the first commercial synthesizable virtual components for SoC emulation that meet MIPI standards. The EVE platforms are available now.
EVE introduced e-zTest 10GbE, which is a 10-Gigabit Ethernet validation platform for their ZeBu (Zero Bugs) family of system-on-chip (SoC) hardware-assisted verification platforms. The e-zTest 10GbE software is a transaction-based environment for high-speed validation of 10GbE functions in network routers, switches and controllers, and SoC application specific integrated circuits (ASICs) containing 10GbE ports.
EVE launched the ZeBu-Blade2 hardware-assisted verification platform. ZeBu-Blade2 is an emulator for application specific integrated circuits (ASICs) and systems on chip (SoCs) implemented in 40-nanometer (nm) technology. It is the first member of the ZeBu emulation family based on Xilinx Virtex6-LX760 field programmable gate arrays (FPGAs). ZeBu-Blade2 is available now. It includes its zFAST, fast synthesis, and a set of ZeBu transactors.
Arteris and EVE teamed together on an integrated solution for system-on-chip (SoC) developers. The design flow enables engineers to generate and use actual SoC register transfer level (RTL) implementations on EVE’s ZeBu-Server emulation platform. The integration flow helps SoC developers create and ship products sooner.
EVE has enhanced the design debugging capabilities of their ZeBu (for Zero Bugs) emulation platform. ZeBu now features Combinational Signal Access (CSA), which enables engineers to dynamically generate complete waveforms of designs. Combinational Signal Access improves productivity and lowers the cost of ownership. CSA comes as a standard component to the ZeBu family. It is available now and, initially, works with zFast, ZeBu Fast Synthesis used with ZeBu emulation systems.
Through a TLM-2.0 transactor adapter, EVE’s ZeBu fast emulation platforms now support the Transaction-Level Modeling Standard (TLM)-2.0, the Open SystemC Initiative (OSCI) interface standard for SystemC model interoperability and reuse. TLM-2.0 support gives software developers and hardware verification teams an interoperable way to map their SoC development environments to EVE’s emulators. It ties both ESL virtual platforms and simulation environments more closely to ZeBu and to each other, providing a standards-based methodology to reuse components for software development, hardware verification and hardware/software co-verification.
EVE will host a webinar on the ZeBu-Server emulation system. The 30-minute webcast, ZeBu-Server: One System, Infinite Verification Possibilities, will take place Thursday, February 18th from noon to 12:45 pm EST.
ZeBu-Server, from EVE (Emulation & Verification Engineering), now offers superior multi-user capabilities that can support up to 25 users concurrently. Each ZeBu-Server user or design can utilize any of the available resources, and allocation of the emulation resources is completely automatic. Each user can have a dedicated host PC with its own PCIe interface for maximum bandwidth and PC computing power. The multi-user capability enables engineers to fully utilize hardware-assisted verification throughout the project cycle.
The new ZeBu-Server comes standard with a powerful debug environment. ZeBu-Server features a wide array of tools that enables debugging at multiple levels of abstraction, because debugging a complex failure in a system-on-chip (SoC) design requires deterministically re-executing billions of clock cycles repeatedly until the problem is identified. ZeBu-Server is a scalable emulation system capable of handling up to one-billion application specific integrated circuit (ASIC) gates.