Jasper Design Automation will hold their annual user meeting November 12 -13, 2012. The Jasper User Group will gather designers, verification engineers and engineering managers from around the world to share the latest verification best practices. The event will take place at the Cypress Hotel in Cupertino, California.
qaqadu event gmbh announced a DSP training course. The title of the class is Digital Signal Processing Theory, Algorithms and Architectures. The DSP course will take place November 6 to 8, 2012 in Munich, Germany (instructions will be presented in English). All attendees will receive electronic and printed versions of the teaching materials. A DVD containing all the simulation models used during the course will also be distributed. The class is ideal for all engineering, marketing and technical management staff.
XJTAG will host a free workshop. The event will explain how boundary scan testing can help board designers and engineers. The boundary scan workshop is designed to provide design, development, test, and production engineers with a practical hands-on introduction to boundary scan. Engineers will learn how boundary scan can be used right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits. The Introductory to Boundary Scan workshop will take place Wednesday, February 29, 2012 at XJTAG’s Cambridge headquarters.
Analog Devices is offering a motor control webinar. The title of the webcast is Solving Embedded Design Challenges in Motor Control. The 45-minute online seminar will take place May 18, 2011, at 12:00 pm ET. The ADI webcast is intended for engineers and students new to the field. Experienced engineers looking for a tutorial on motor control design may also find the webinar informative.
Analog Devices (ADI) will host a webinar on February 16, 2011, at 12:00 pm EST (archived after the 16th). The Interfacing RF Components webcast will discuss the interfacing of stages within the RF receive and transmit paths and explores harmonics, attenuation, and other challenges that could arise when RF stages are not properly connected. The online event will examine RF (radio frequency) interface design challenges and cover best practices to help engineers get the most out of their RF circuits. The Interfacing RF Components webinar is intended for engineers seeking design and system-level support.
Analog Devices, Inc. (ADI) is offering a webinar, titled: Fundamentals of Designing with Semiconductors: Sensors and How to Use Them. The online seminar will review the concepts of physical signals and explore why and how they must be changed into analog electrical signals, and how they can be processed for the highest reproduced accuracy. The webcast will take place January 12th at noon EST. The Sensors and How to Use Them webinar will be archived after the webcast takes place.
Microchip Technology is offering a $150 early-bird discount to their Worldwide MASTERs Conference at the JW Marriott Desert Ridge Resort in Phoenix, Arizona. MASTERs will take August 25 – 28 (Pre-Conference on August 23-24). Design engineers must register by May 14th to get the early-bird discount. The MASTERs Conference provides embedded systems engineers with a forum for sharing and exchanging technical information on Microchip’s 8-, 16- and 32-bit PIC microcontrollers, analog and interface solutions, 16-bit dsPIC digital signal controllers, wireless and mTouch sensing solutions, memory products, and MPLAB development systems.
The MathWorks and Mentor Graphics developed an integrated workflow for DO-254 compliance using Model-Based Design. The approach combines tools from The MathWorks and Mentor Graphics to support Model-Based Design throughout all stages of the development process, including requirements definition and management, conceptual and detailed design, implementation, and testing. With the integrated workflow, aerospace engineers can verify designs earlier, implement in HDL faster, gain greater reuse of design and verification effort, and more easily manage requirements and test cases throughout the entire development process.
Texas Instruments announced the DesignStellaris 2010 design contest for embedded engineers. Each entry will be judged equally on technical merit, originality, usefulness, cost-effectiveness and design optimization by an independent panel of judges. Additional points will be awarded for the use of the StellarisWare IEC60730 library and for applications that improve safety or reliability with SafeRTOS. DesignStellaris 2010 contest will take place through June 23, 2010.
Maia EDA introduced the Maia functional verification tool. Maia uses a description of the expected behavior of a device to automatically create a complete self-checking reactive testbench, so freeing engineers from the time-consuming, complex, and error-prone task of manual testbench creation. The tool has been designed to enable both engineers and non-engineers to quickly verify modules and sub-systems, and is initially being offered without cost by the company, allowing trial without registration or risk.