Triad Semiconductor and Mentor Graphics introduced ViaDesigner, which is a new electronic design automation (EDA) tool that enables system-level engineers, who have no previous IC design experience, to design their own mixed-signal configurable ASICs. The new approach to low cost, mixed-signal IC design enables new IC development in two to six months, allows respins in less than four weeks, and can reduce the cost and risk typically associated with custom mixed-signal IC design.
Nimbic (formerly Physware) launched the beta version of nCloud, which is a scalable and secure cloud computing platform for electronic design automation (EDA). nCloud is a pay-for-use, peak-usage cloud computing platform. nWave 3D full-wave EM solver for signal and power integrity (formerly PhysWAVE), and nApex 3D accelerated parasitic extractor (formerly PhysAPEX), are currently available on nCloud.
Synopsys will hold their Electronic Design Automation (EDA) Interoperability Forum in Santa Clara, California on Thursday, October 21, 2010 from 9:30 am to 4:30pm. As you can guess from the name of the event, Forum focuses on the latest developments in EDA interoperability. The forum is ideal for EDA tool developers, IC design and verification engineers, IP providers and members of the press to discuss the industry-critical topics of interoperability and standards. The EDA Interoperability Forum is free and lunch and a light breakfast are included.
Mentor Graphics had issued a call-for-entries for their PCB Technology Leadership Awards competition. The electronic design automation (EDA) competition recognizes engineers and computer aided design (CAD) designers who use Mentor’s technology to address complex printed circuit board systems design challenges, such as small form factor, high-speed content, design team collaboration, advanced PCB fabrication technologies, and design-cycle time reduction. The timeframe for submitting entries is from July 15 – September 24, 2010. Winners will be announced November 9th.
OneSpin Solutions’ 360 MV formal assertion-based verification (ABV) solution has been integrated with Platform Computing’s LSF infrastructure. The customizable integration between 360 MV and Platform LSF enables engineers to adapt job scheduling and resource utilization to their needs. Designers can track named proof tasks using LSF monitoring tools, which report progress directly into the 360 MV graphical environment.
AWR launched version 9.01 of the AWR Design Environment (AWRDE). The latest release of AWRDE features over 100 enhancements that increase productivity. The new features include enhancements to AWR’s APLAC harmonic balance engine and AXIEM 3D planar electromagnetic (EM) simulator.
According to the EDA Consortium (EDAC) Market Statistics Service (MSS), the Electronic Design Automation (EDA) industry revenue for Q3 2009 is $1,167.9 million, a 3.8% sequential increase from Q2. On a Q3/Q3 basis, EDA industry revenue declined 7.2%, compared to $1,258.6 million in Q3 2008. The four-quarter moving average declined 13.1%. Companies that were tracked employed 25,942 professionals in Q3 2009, down 7.9% from the 28,176 employed in Q3 2008, and down 1.4% from the 26,298 employed in Q2 2009.
The 22nd electronic design automation (EDA) Interoperability Forum will take place Thursday, November 5th in Santa Clara, California from 9:00 am to 5:00 pm in the Sun Conference Center at Agnews Historic Park. The Forum is open to all who wish to attend at no cost. Lunch and a light breakfast are included. The event is recommended for EDA tool developers, IC design engineers, and IP providers to discuss the industry-critical topics of interoperability and standards.