EMA Design Automation (EMA) and AEi Systems have announced the latest version, 4.1, of the AEi Systems’ Power IC Model Library for the Cadence PSpice simulator. “This update to the power IC model library will make it easier for our PSpice customers to obtain high quality bench tested models,” says Manny Marcano, President and CEO of EMA.
Altium introduced Altium Designer 2013. The latest release of the tool includes a set of new PCB features, and fixes to core Schematic and PCB tools. Altium Designer 2013 also opens up the DXP platform. The EDA tool makes it easier for engineers to create next generation electronic designs. Altium Designer 2013 is now available for download.
Agilent Technologies recently launched the latest version of their Advanced Design System (ADS). ADS 2012 features new user interface enhancements designed to improve design efficiency and productivity. For example, dockable windows enable designers to quickly access frequently used dialog boxes, such as component information and layer visibility in layout. ADS electronic design automation software is ideal for RF, microwave and high-speed digital applications.
Cadence Design Systems will hold the CDNLive! EMEA user conference from May 14-16 at the Dolce Hotel in Munich/Unterschleissheim. The annual user conference will share fresh new and best practices that address all aspects of design and IP creation, integration, and verification. Attendees of CDNLive! EMEA will get to explore new techniques for realizing advanced silicon, SoC, and systems.
Triad Semiconductor and Mentor Graphics introduced ViaDesigner, which is a new electronic design automation (EDA) tool that enables system-level engineers, who have no previous IC design experience, to design their own mixed-signal configurable ASICs. The new approach to low cost, mixed-signal IC design enables new IC development in two to six months, allows respins in less than four weeks, and can reduce the cost and risk typically associated with custom mixed-signal IC design.
Nimbic (formerly Physware) launched the beta version of nCloud, which is a scalable and secure cloud computing platform for electronic design automation (EDA). nCloud is a pay-for-use, peak-usage cloud computing platform. nWave 3D full-wave EM solver for signal and power integrity (formerly PhysWAVE), and nApex 3D accelerated parasitic extractor (formerly PhysAPEX), are currently available on nCloud.
Cadence Design Systems recently published a white paper on their new Silicon Realization approach. The technical paper explains how Silicon Realization is a fundamentally new approach to semiconductor design, verification, and implementation. Silicon Realization extends traditional EDA to cover both integration and creation. It unites functional, physical, and electrical concerns. It is also based on three emerging concepts: unified intent, higher abstraction levels, and convergence.
Synopsys will hold their Electronic Design Automation (EDA) Interoperability Forum in Santa Clara, California on Thursday, October 21, 2010 from 9:30 am to 4:30pm. As you can guess from the name of the event, Forum focuses on the latest developments in EDA interoperability. The forum is ideal for EDA tool developers, IC design and verification engineers, IP providers and members of the press to discuss the industry-critical topics of interoperability and standards. The EDA Interoperability Forum is free and lunch and a light breakfast are included.
Synopsys will host an online synposium from August 31st to September 2nd. The virtual event will feature Synopsys’ EDA software, IP, prototyping, and services for semiconductor design, verification and manufacturing. During the event, engineers can chat with Synopsys technical staff and view product demos, webinars, and technical papers. Designers can view synposium materials on-demand through December 3, 2010.
Mentor Graphics had issued a call-for-entries for their PCB Technology Leadership Awards competition. The electronic design automation (EDA) competition recognizes engineers and computer aided design (CAD) designers who use Mentor’s technology to address complex printed circuit board systems design challenges, such as small form factor, high-speed content, design team collaboration, advanced PCB fabrication technologies, and design-cycle time reduction. The timeframe for submitting entries is from July 15 – September 24, 2010. Winners will be announced November 9th.