Tag Archives: Design Suite

Tanner HiPer Silicon v15.23 Features HiPer Simulation AFS and T-AFS

Tanner EDA's S-Edit design environment for schematic capture

Tanner EDA introduced the latest version of HiPer Silicon full-flow analog and mixed-signal design suite. HiPer Silicon v15.23 includes HiPer Simulation AFS and Tanner Analog FastSPICE (T-AFS), which integrates the Berkeley Design Automation Analog FastSPICE Platform with Tanner EDA’s S-Edit schematic capture and W-Edit waveform analyzer.

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Tanner EDA HiPer Silicon v15 Design Suite

Tanner EDA announced version 15 of the HiPer Silicon design suite. HiPer Silicon v15 gives designers a complete analog design flow from schematic capture, circuit simulation, and waveform probing to physical layout and verification. HiPer Silicon v15 full-flow design suite is available now for the Windows operating system. A Linux version will be available later.

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