Tag Archives: debug

Wind River Simics v4.6 Simulator

Wind River announced version 4.6 of their Simics full system simulator. Simics can simulate the functional behavior of the target hardware, from a single processor to large, complex, and connected electronic systems. Simics 4.6 features the ability to debug software applications that expand over multiple boards, increases team collaboration, and enables target system visualization and surveillance. Wind River Simics v4.6 will be available by the end of this month.

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Lauterbach Long Term Trace Debug Technology

Lauterbach’s Long Term Trace technology collects large amounts of code performance information from a running embedded system. The data helps engineers to detect and analyse the unpredictable and transient of bugs. Long Term Trace enables extended measurement times for TRACE32 profiling and code-coverage functions. The technology is ideal for the automotive, medical and aerospace industries.

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Ellexus Breeze for Managing EDA Builds and Scripted Flows

Breeze, from Ellexus, is a tool designed to managed EDA builds and scripted flows. The Integrated Development Environment (IDE) is based on Eclipse for Linux. The tool helps developers understand interpreted (scripted) and compiled programs in order to quickly debug complex build systems in a familiar environment. Breeze traces the relationships between files, scripts and programs in a system. As a result, the tool can be used to debug or manage any flow or language without integration.

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XJTAG v2.5 Includes Free Layout Viewer

XJTAG version 2.5 features a free layout viewer. The XJTAG Layout Viewer works in conjunction with XJDeveloper and XJRunner. XJDeveloper enables engineers to quickly and easily set up and run tests on a circuit and create and customize tests to their requirements. XJRunner is a specialized run-time environment for testing. It includes a range of features that are useful for engineers in debugging, testing and doing repair work.

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SpringSoft Siloti Visibility Automation System

SpringSoft rolled out the latest version of Siloti Visibility Automation System. The tool features a streamlined, easy-to-use flow for system-on-chip (SoC) verification and debug. It also includes a new reusable behavior analysis database to eliminate redundant analysis cycles and speed up design preparation time by over 10X (compared to previous version). The new version of the Siloti Visibility Automation System is available now. Prices start at $26,400 for a three-year subscription license.

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PLS Universal Debug Engine 3.0

Universal Debug Engine (UDE) 3.0 is the latest debugging tool from PLS Programmierbare Logik & Systeme. UDE 3.0 features unique visualization capabilities, an enhanced Eclipse integration and extensive dedicated support for a wide range of high-end microcontroller architectures. Universal Debug Engine 3.0 is available for all 32-bit and 64-bit versions from Windows XP to Windows 7. The tool can be integrated at no extra cost in Eclipse environments based on Ganymede 3.4.x, Galileo 3.5.x and Helios 3.6 with the appropriate C/C++-IDE (CDT 5.0.x,6.0,7.0).

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GiDEL TotalHistory for ASIC Prototyping and FPGA Debug

TotalHistory, from GiDEL, is a software only solution that enables engineers to have visibility of any signal in their designs, for virtually unlimited trace depth, with no or minimal degradation in performance. TotalHistory is available with GiDEL’s PROC_SoC ASIC Prototyping Systems and PROC Boards FPGA-based High Performance Computing (HPC) accelerators.

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Tektronix TLA6000 Series Logic Analyzers

Tektronix introduced the the TLA6000 Series logic analyzers. The TLA6000 offers high-end debug and analysis for embedded systems designers. The TLA6000 logic analyzers are available in 68, 102, and 136 digital channel configurations with 125 ps high speed timing on all channels, up to 450 MHz state timing and up to 128 Mb record length. The new logic analyzer is now available globally. The TLA6000 Series has a base system configuration price of $19,800 U.S. MSRP. The TLA6000 Series is ideal for debug and analysis applications — including signal integrity analysis, FPGA debug and verification, MIPI protocol analysis, memory system validation, and embedded software integration and debug.

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Vennsa Technologies OnPoint Verification Tool for Automated Debugging

Vennsa Technologies introduced OnPoint verification tool for automated debugging. OnPoint automates the manual root cause analysis performed by verification engineers once a functional failure occurs. It picks up where simulation and formal verification tools leave off by automatically analyzing the problem and pointing to the exact lines of code where the failure can be fixed. This error localization process is performed with no intervention by the engineer.

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JTAG ProVision v1.8 Boundary Scan Tool

JTAG Technologies introduced JTAG ProVisionT V1.8 boundary-scan tool. The ProVision development and hardware debug tool combines advanced automation with the level of control and precision that engineers demand when creating test programs and in-system programming (ISP) routines for PLDs, FPGAs, flash memories, serial PROMs, and other devices.

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