Tag Archives: CPF

Cadence Design Systems Debuts Incisive Enterprise Simulator v13.1

Cadence Incisive Enterprise Simulator screenshot

Cadence Design Systems released version 13.1 of the Incisive Enterprise Simulator. The latest release of the software tool improves low-power verification productivity of complex SoCs by 30%. Cadence Incisive Enterprise Simulator v13.1 features new capabilities that ease the challenge of verifying all of today’s power-aware designs.

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Azuro Rubix 1.4 and PowerCentric 5.2 Clock Tree Synthesis Tools

Azuro introduced version 5.2 of PowerCentric clock tree synthesis tool and version 1.4 of Rubix clock concurrent optimization tool. Clock concurrent optimization is a new approach to clock tree synthesis which builds useful skew-based clocks concurrently with performing logic gate sizing and placement. The key defining characteristic of clock concurrent optimization is that the timing picture being considered by all its underlying algorithms is a true propagated clocks view of timing based on real propagation of clock signals through the clock network.

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