CoWare’s SystemC-based software development solution now supports Fast Models from ARM for Cortex-A5 and Cortex-M4 processor IP. The CoWare software development solutions already include support for Fast Models from ARM for the Cortex-A9, Cortex-A8, Cortex-R4 and Cortex-M3 processors. The ARM Cortex IA Model Integration Library to enable usage of Cortex-A5, Cortex-A8, Cortex-A9, Cortex-R4, Cortex M3 and Cortex-M4 Fast Models from ARM in CoWare Virtual Platform and CoWare Platform Architect is available from CoWare now.
The 2010.1 release of CoWare Platform Architect and CoWare Virtual Platform features system-centric analysis. The system-centric analysis offers non-intrusive data collection, Eclipse-based visualization, and meaningful system metrics. Early users of the system-centric analysis have reported identifying and addressing design issues in a matter of hours rather than days or weeks. The 2010.1 Release of CoWare Platform Architect, CoWare Virtual Platform, and the CoWare Model Library are available now.
CoWare is offering a webinar about LTE UE Synchronization. The one-hour webcast will take place on Wednesday, March 3, 2010 (2:00 pm Pacific | 5:00 Eastern). The Introduction to LTE UE Synchronization webinar will present an overview of the cell search process, an introduction to the primary synchronization signal (PSS) and secondary synchronization signal (SSS), and explain how to detect the PSS and acquire frame and slot timing.
CoWare announced the Versatile Virtual Reference Board with access provided through Software as a Service (SaaS). The Virtual Platform is a soft emulator of the ARM RealView Versatile Platform Baseboard for ARM926-EJS provided for educational purposes only. It includes a virtualized Ethernet Controller, UARTs, keyboard and mouse interfaces, and a frame-buffer console that enables designers to interact with the platform. The packages come with a complete Linux software stack, including kernel and file-system. A comprehensive user’s guide introduces the usage of virtual platforms for embedded software development.
CoWare introduced a high-speed model for Renesas Technology’s (Renesas) SH-4A core model. The model is already in use at Renesas for the creation of high-speed virtual platforms targeted at Renesas customers in the automotive, consumer and wireless markets. The Renesas SH-4A core model is available now from CoWare for use in CoWare Platform Architect and CoWare Virtual Platform, release 2010.1. The model was developed in tight collaboration between CoWare and Renesas ensuring the highest level of quality and verification to Renesas’ test suite.
More info: CoWare
CoWare and Tensilica teamed together to further enhance the integration of Tensilica’s processor models into the CoWare tools to support CoWare’s advanced functionality to ease software development on multi-core Tensilica-based SOC (system-on-chip) designs. The enhanced solution is being used by joint CoWare-Tensilica customers in automotive, consumer, and wireless markets. Tensilica Xtensa and Diamond Standard PSPs are available immediately from CoWare as part of the CoWare Model Library.
Coware is offering a webinar, entitled “Custom Processor / Programmable Accelerator Design and Implementation.” The webcast will take place Wednesday, November 11, 2009 at 10:00 am Pacific (1:00 pm Eastern). The online seminar is one hour long and is free to attendees. The webinar will be presented by Drew Taussig (Senior Product Specialist for the Processor Design solutions at CoWare).
The CoWare SBL-301 SystemC Bus Library for Platform Architect enables early configuration, exploration, and optimization of next-generation system-on-chip (SoC) architectures using AMBA technology-based virtual platforms in SystemC. The new CoWare SBL-301 SystemC Bus Library and architecture design solution featuring CoWare Platform Architect and AMBA designer ADR-301 is available for early customer evaluation now. Production release is expected in December 2009.