Tag Archives: Co-Design

Tanner EDA and SoftMEMS Host MEMS Co-Design Webinar

Tanner EDA and SoftMEMS are hosting a webinar about eliminating bottlenecks in MEMS-IC co-design. The online seminar will take place April 10th at 8:30am Pacific time (11:30am Eastern time). The webcast will feature a presentation, demonstration, and live Q&A session. Tanner EDA provide tools for the design, layout and verification of analog and mixed-signal integrated circuits (ICs) and MEMS devices. SoftMEMS provides the CAD design environment used for the development and test of MEMS products.

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Cadence Allegro v16.5 PCB and IC Tool

Cadence Design Systems announced version 16.5 of their Allegro PCB and IC packaging technology. Allegro v16.5 features advanced miniaturization capabilities, integrated power delivery network analysis, DDR3 design-in kit, improved co-design, and flexible team-design enablement. The new features and capabilities improve the path to co-design and analysis between engineers involved in Silicon, SoC, and System Realization. Cadence Allegro 16.5 will be available in late May. Allegro 16.5 technology will also be available through product configuration with on-demand features for specific design tasks.

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Co-Design Solutions – Bridging the Gap from Silicon to System

At the Microelectronics Packaging and Test Engineering Council (MEPTEC) Technical Symposium, Apache Design Solutions will take part in a technical session, Co-Design Solutions – Bridging the Gap from Silicon to System. The session will focus on fast 3D EM simulations. MEPTEC takes place in San Jose, California, on Thursday, February 25.

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