Tag Archives: Analog FastSPICE

Tanner HiPer Silicon v15.23 Features HiPer Simulation AFS and T-AFS

Tanner EDA's S-Edit design environment for schematic capture

Tanner EDA introduced the latest version of HiPer Silicon full-flow analog and mixed-signal design suite. HiPer Silicon v15.23 includes HiPer Simulation AFS and Tanner Analog FastSPICE (T-AFS), which integrates the Berkeley Design Automation Analog FastSPICE Platform with Tanner EDA’s S-Edit schematic capture and W-Edit waveform analyzer.

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Tanner Analog FastSPICE Features Berkeley Design Automation AFS

Tanner EDA introduced Tanner Analog FastSPICE (T-AFS), which adds Berkeley Design Automation Analog FastSPICE Platform to Tanner EDA’s full-flow HiPer Silicon design suite. With the availability of Analog FastSPICE as an add-on to Tanner EDA’s analog and mixed-signal design tools, RF designers can realize the benefits of Tanner EDA’s full-flow analog design suite. Analog FastSPICE enables verification of very complex analog/ RF circuits with nanometer SPICE-accurate results.

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Nanometer IC Variation Analysis Design Flow

Berkeley Design Automatio and Solido Design Automation teamm on a validated flow for rapid reduction in variation risk in nanometer designs at the transistor level. In the solution, Variation Designer utilizes the AFS Platform. The result is variation analysis capabilities that enable designers to rapidly reduce variation risk.

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