Aldec introduced ALINT 2010.06, which is a design rule checking software solution. ALINT 2010.06 features a phase-based linting (PBL) methodology that provides structured and prioritized phases for the analysis of HDL design issues. The design rule checking tool reduces the number of linting iterations and error messages at each phase. ALINT eliminates more design issues incrementally at each phase. Default phases may be modified or customized by engineers for adherence to corporate design policies or conducting targeted design rule checks. The latest release of ALINT is available now. The tool supports STARC, RMM, DO-254 and Aldec design rule plug-ins, which are sold separately.
Aldec introduced ALINT 2009.10 Design Rule Checking application. The product includes “best-practice” design rules for fast design closure of safety critical DO-254/ED-80 Avionics designs. ALINT is Design Rule Checking software for fast design closure. ALINT analyzes and detects issues early in the design and verification cycle, and checks HDL source code of complex ASIC, FPGA, and SOC designs. It detects such problems as poor coding styles, improper clock and reset management, simulation and synthesis problems, poor testability, and source code issues throughout the design flow.