Agilent Technologies recently launched the latest version of their Advanced Design System (ADS). ADS 2012 features new user interface enhancements designed to improve design efficiency and productivity. For example, dockable windows enable designers to quickly access frequently used dialog boxes, such as component information and layer visibility in layout. ADS electronic design automation software is ideal for RF, microwave and high-speed digital applications.
Agilent Technologies introduced the latest verion of their Advanced Design System and Electromagnetic Professional software. ADS 2011.10 RF design software and EMPro 2011.11 3-D modeling and simulation platform include enhancements to speed and improve RF design and verification. AADS 2011.10 will ship later this month. EMPro 2011.11 will be available for download in late October. Pricing for the ADS and EMPro environments start at $8,000 and $7,000, respectively.
Agilent Technologies introduced IC-CAP WaferPro (Integrated Circuit Characterization and Analysis Program Wafer Professional) software. WaferPro is a multi-site, multi-wafer, automated DC and RF measurement solution for semiconductor device modeling applications. IC-CAP WaferPro enables engineers to control semiautomatic and fully automatic probe stations. Agilent WaferPro automates spot and swept measurements across a range of temperatures. WaferPro is distributed with the Agilent IC-CAP 2010.08 software.
Agilent Technologies introduced Electromagnetic Professional (EMPro) 2010 3D electromagnetic (EM) modeling and simulation software for analyzing the 3D EM effects of IC packages, connectors, antennas and other RF components. EMPro 2010 features new capabilities resulting in faster simulation, enhanced accuracy, and improved design efficiency. EMPro now supports Microsoft Windows 7, Vista, XP, Redhat RHEL WS 4, and Novell SUSE SLES 10.
The theme of the 2010 Agilent Measurement Forum Asia tour is Powering Collaboration and Innovation in Wireless and Digital Arenas. The Agilent tour will start in Shanghai on April 13, with additional stops in Beijing and Shenzhen, China. Other tour locations include Taiwan (Taipei and HsinChu), South Korea (Seoul), India (Bangalore and New Delhi), Malaysia (Penang), and Singapore.
Agilent Technologies rolled out version 4.4 of the GoldenGate software for RFIC simulation, verification and analysis. GoldenGate Release 4.4 features enhanced performance, new key stability and yield analyses, and RF extensions to mixed-signal simulation. GoldenGate version 4.4 improves RFIC design in advanced CMOS technology nodes. The Agilent GoldenGate version 4.4 is available December 2009 and has a starting price of under $25,000.
Agilent Technologies and Stanford University are working on a research program designed to explore a new class of nanoscale devices using a combinations of the scanning probe microscope (SPM) and atomic layer deposition (ALD). The research will enable the rapid prototyping and characterization of nanoscale devices with breakthroughs in sub 10 nm scale for a wide range of applications. The work between Agilent and Stanford University is part of Agilent’s University Relations Program, which facilitates collaborations with universities around the world.
Agilent Technologies released the test procedures for physical and protocol-layer device testing according to the Serial ATA International Organization: Serial ATA (SATA) Revision 3.0 standard. The SATA Revision 3.0 standard defines a maximum transfer speed of 6.0 Gb/s, which is double the speed of previous-generation technology. Faster transfer speeds enable higher-performance storage for applications such as emerging solid-state drives and enterprise business storage. This new specification will enable users to move large quantities of data at faster rates, which is increasingly critical for today’s high-resolution photos, videos, music, and multimedia files.
Agilent’s Advanced Design System (ADS) 2009 Update 1 features a new statistical mode for the signal integrity Channel Simulator. The new statistical mode is ideal for design and verification of high-speed, chip-to-chip data links found in most consumer and enterprise digital products produced today. By accelerating simulation, the new Channel Simulator mode allows manufacturers of such products to more quickly explore and arrive at an optimal design and eliminates the need for costly and time-consuming prototype iterations, dramatically improving time-to-market.