XJTAG Introduces XJQuad Four-port JTAG Adaptor
XJTAG introduced their XJQuad multiport JTAG testing solution. XJQuad is a cost-effective four-port JTAG adaptor targeted at manufacturers. It uses a single USB 2.0 port on a PC to provide high speed JTAG access and can simultaneous test four circuit boards, each of which can be provided with up to four JTAG Test Access Ports. XJQuad enables engineers to test boards together in batches, or to run the four ports independently. XJQuad is ideal for connection testing, in-system programming, non-JTAG device testing, and serial number handling.
International Symposium on Quality Electronic Design Features 100 Papers
The International Symposium on Quality Electronic Design will take Monday, March 19 through Wednesday, March 21, 2012 at TechMart, Santa Clara. The 13th annual ISQED features talks by experts that cover multiple topics related to electronic design and semiconductors. Speakers and attendees include designers, users, and providers of integrated circuits (IC) and systems, semiconductor packaging, assembly and test technology, as well as Electronic Design Automation (EDA) tools. The conference includes 22 technical sessions with close to one hundred papers. It also features keynotes, tutorials, workshops and exhibits with a focus on the latest innovations in electronic design.
International Symposium on Quality Electronic Design Features 100 Papers »
ADI Webinar: High-Performance MEMS; What does that mean?
Analog Devices will host a webcast this week. The webinar will examine the most common specifications and metrics associated with high performance MEMS accelerometers, gyroscopes and inertial measurement units (IMUs) and will provide insights into their characterization and impact on real-world applications. The title of the online seminar is: High-Performance MEMS; What does that mean? The event will take place March 14, 2012, at 12:00 pm EST.
CDNLive! User Conference in Silicon Valley Taking Place Next Week
Cadence Design Systems is hosting their annual CDNLive! User Conference in Silicon Valley next week. The user event features technical papers, keynote speakers, techtorials, networking opportunities, and a designer expo. CDNLive! brings together Cadence technology users, developers, and industry experts to network, share best practices on critical design and verification issues, and discover new techniques for realizing advanced silicon, SoCs, and systems. CDNLive! Silicon Valley will take place at the DoubleTree Hotel, San Jose, California from March 13-14, 2012.
CDNLive! User Conference in Silicon Valley Taking Place Next Week »
Docea Power Launches AceThermalModeler for Thermal Modeling
Docea Power introduced their AceThermalModeler (ATM) software. ATM is an easy to use tool for generating thermal models of System on Chips (SoCs), 3D ICs, Systems in Package (SiPs) or complete boards. With AceThermalModeler, system architects can perform both thermal steady state or coupled power and thermal analysis for dynamic application profiles running on different architecture configurations.
Docea Power Launches AceThermalModeler for Thermal Modeling »
Webinar: Optimizing Energy Efficiency in Digital Power Designs
Avnet Electronics Marketing Americas and Texas Instruments will host a webinar about TI’s C2000 portfolio of fixed point, floating point and multi-core processors. The webcast will focus on advanced motor control techniques, digital light emitting diode (LED) control and renewable power in solar power systems. The web-based training seminar will take place March 15, 2012, at 9:30 am PDT (11:30 am CDT, 12:30 pm EDT). The title of the 60-minute webinar is: Optimizing Energy Efficiency in Digital Power Designs
Webinar: Optimizing Energy Efficiency in Digital Power Designs »
Mentor Graphics Introduces Version 9.4 of PADS PCB Design Tools
Mentor Graphics rolled out version 9.4 of their PADS PCB design tools. PADS v9.4 release provides engineers with the critical technologies required for today’s complex PCB designs. The completely integrated and scalable PADS 9.4 flow addresses high-speed, thermal, manufacturing prep, signal and power integrity, and FPGA to PCB optimizations. The PADS 9.4 software includes new associated nets functionality, which reduces design time and helps designers easily define high-speed associated nets, assign constraints, and be assured that they will be routed to those rules.
Mentor Graphics Introduces Version 9.4 of PADS PCB Design Tools »
Cadence Releases New RTL-to-GDSII Flow for Giga-Scale, 20nm Designs
Cadence Design Systems announced a new RTL-to-GDSII flow. The latest release of the Cadence Encounter RTL-to-GDSII flow features GigaFlex technology, physical-aware synthesis, GigaOpt engine, and differentiated CCOpt technology. The updated flow is ideal for high-performance and giga-scale designs, including those at the latest technology node, 20 nanometers. It enables more efficient development of SoCs, meeting and exceeding the power, performance and area demands of today’s market requirements.
Cadence Releases New RTL-to-GDSII Flow for Giga-Scale, 20nm Designs »
Symtavision Releases Version 3.1 of SymTA/S and TraceAnalyzer
Symtavision released version 3.1 of SymTA/S and TraceAnalyzer integrated system-level tools for planning, optimizing and verifying embedded real-time systems. Improvements in SymTA/S 3.1 and TraceAnalyzer 3.1 include new Scenario Management, a new FIBEX 3.1 import interface and improved Relative Deadline support. In addition, over 50 functional improvements have been implemented at the request Audi, BMW, Bosch, Daimler, Fiat, General Motors, Infineon and Volkswagen.
Symtavision Releases Version 3.1 of SymTA/S and TraceAnalyzer »
Webinar: ESD Protection in Complex Analog Mixed Signal and High-Voltage Designs
X-FAB Silicon Foundries will conduct a webinar about ESD protection. The webcast will explain how to eliminate the threat of electrostatic discharge that can cause irreversible damage to integrated circuits. The free hour-long online seminar will take place Tuesday, March 6, 2012 and Wednesday, March 7, 2012. The X-FAB webinar is titled, On-Chip ESD Protection in Complex Analog/Mixed-Signal and High-Voltage Designs.
Webinar: ESD Protection in Complex Analog Mixed Signal and High-Voltage Designs »
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