Electronic Design Automation Industry - Q4 2007
According to the EDA Consortium Market Statistics Service (MSS), the electronic design automation (EDA) industry revenue for Q4 2007 grew 6.7% to $1,602.7 million, versus $1,501.9 million in Q4 2006. The four-quarter average growth rate, which compares the most recent four quarters to the same four quarters in the prior year, was 9.1%. Companies that […]
Semiconductor Chip Sales - February 2008
According to the Semiconductor Industry Association (SIA), worldwide sales of semiconductors in February were $20.44 billion, an increase of 1.5% from February 2007 when sales were $20.14 billion. Sales declined by 4.9% from January when the industry reported sales of $21.48 billion. According to SIA, the sequential decline in February sales was in line with […]
Fujitsu and HHI Develop Nonlinear Optical Fiber Technology
Fujitsu Laboratories Ltd. and Heinrich Hertz Institut (HHI) announced the development of an ultra high-speed optical switch that uses nonlinear optical fiber to reduce optical amplitude noise, which degrades the quality of optical signals when they are transmitted. Employing this technology, suppression of optical amplitude noise using a 107 gigabit per second (Gbps) phase modulated […]
iWOW M2M Open Protocol
The iWOW M2M Open Protocol (iMOP) is an event-driven software engine that offers developers a simpler and easier way to automate the communication of data in Machine-To-Machine (M2M) applications. Embedded atop iWOW's TR-800 GSM/GPRS modules, iMOP is specially designed to suit the requirements for applications such as remote monitoring, fleet management and asset tracking.
iMOP aims […]
Network On Chip Benchmarking Specification
OCP-IP recently announced that part one of the Network On Chip (NoC) Benchmarking specification has entered member review. Part one of the specification details requirements and features for application programs, synthetic micro-benchmarks, and abstract benchmark applications. It discusses ways to measure and benchmark reliability, fault tolerance, and testability of the on-chip communication fabric.
The specification was […]
Tanner EDA Announces HiPer PX and Verilog-A
Tanner EDA recently announced HiPer PX and Verilog-A. Both are now part of Tanner Tools V13.0. HiPer PX reduces design errors and shortens the design verification process by generating highly accurate RC models for interconnect parasitics that include higher-order moments and are guaranteed to be accurate up to a user-defined signal frequency. HiPer PX is […]
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