High-frequency EDA software company AWR is releasing V11 Analyst-MP analysis software. It is an application-specific product that leverages its Analyst 3D FEM EM simulation and analysis software.
Discrete semiconductor and passive electronic component manufacturer Vishay Intertechnology’s PHP series of precision high-power thin film chip resistors are now extended to compact 0603 and 0805 cases for power ratings of 0.375 W and 0.675 W. The resistors are optimized for medical imaging, industrial, telecomm, and instrumentation applications.
The hardware-accelerated Constant False Alarm Rate (CFAR) IP from EnSilica is designed for use in situational awareness radar sensors for car driver-assist apps. It allows the application processor to be freed up by providing a marked-up radar image.
Mentor Graphics introduced the Embedded Hypervisor tool for in-vehicle infotainment (IVI) systems, telematics, advanced driver assistance systems (ADAS) and instrumentation. The Mentor Embedded Hypervisor is a small footprint Type 1 hypervisor developed specifically for embedded applications and intelligent connected devices. The Mentor Embedded Hypervisor product will ship in December 2013.
LDRA is offering a two-day seminar on DO-178C and DO-254A. The event will focus on the invocation of DO-178C and the new FAA and EASA guidance that has formed the foundation of the proposed DO-254A standard. The seminar will also explain the DO-178C processes and show how to apply them across the development lifecycle. The title of the seminar is Invoking DO-178C and Getting Ready for DO-254A.
Tanner EDA announced a seminar for next week. The title of the event is Driving Innovation in Image Sensors and High Speed Analog/Mixed-Signal Design. The Lunch & Learn seminar will be moderated by SemiWiki founder Dan Nenni and will discuss the challenges and opportunities for improving productivity in analog and mixed-signal (A/MS) IC design. The seminar will take place on Thursday, October 24th, at TechMart in Santa Clara, California.
Synopsys introduced their new DesignWare ARC EM SEP (Safety Enhancement Package) Processor core for automotive safety-compliant applications. The ARC EM SEP core is configurable to meet the performance, power and area requirements of each target application. Giving designers the ability to define custom instructions facilitates the integration of proprietary hardware accelerators that improve application-specific performance while reducing power consumption and the amount of memory required — critical requirements in embedded automotive designs.
Cadence Design Systems announced a suite of ultra-fast, low-power analog intellectual property (IP) products. The new data converter family includes 7-bit 3GSPS dual ADC and DAC, 11-bit 1.5GSPS dual ADC, and 12-bit 2GSPS dual DAC. The converters are ideal for designers working with emerging high-speed protocols such as WiGig (802.11ad), which runs on a 60 GHz spectrum with potential data throughput up to 7Gbps, as well as LTE and LTE Advanced. The Cadence 28nm Data Convertor IP family is available now.
Mentor Graphics introduced hardware and software solutions to accelerate the verification of High-Definition Multimedia Interface (HDMI) version 2.0 products. Mentor verification solutions enable designers to test the HDMI 2.0 devices integrated on their System-on-Chip (SoC) designs, and develop and stress-test their software and hardware with billions of verification cycles before silicon is available. The solutions are available for deployment at customer sites effective immediately.
Cadence Design Systems launched the Spectre XPS (eXtensive Partitioning Simulator). The high-performance FastSPICE simulator delivers faster and more comprehensive simulation for large, complex chip designs. The Spectre XPS FastSPICE simulator features next generation algorithms that deliver the simulation accuracy and performance required to reduce the risks of developing cutting-edge differentiated designs.