Introductory to Boundary Scan Workshop
XJTAG will host a free workshop. The event will explain how boundary scan testing can help board designers and engineers. The boundary scan workshop is designed to provide design, development, test, and production engineers with a practical hands-on introduction to boundary scan. Engineers will learn how boundary scan can be used right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits. The Introductory to Boundary Scan workshop will take place Wednesday, February 29, 2012 at XJTAG’s Cambridge headquarters.
New Cadence Book: Advanced Verification Topics
Cadence Design Systems published a new book: Advanced Verification Topics. The 229-page book describes the latest techniques and methodologies for verifying today’s most complex IP and systems on chips (SoCs). It discusses topics like metric-driven verification of digital and mixed-signal designs, low-power verification using the UVM, multi-language UVM, and acceleration for the UVM. The Cadence book is ideal for aid verification engineers. It builds on a prior Cadence book, A Practical Guide to Adopting the Universal Verification Methodology (UVM).
Making the Most out of Multicore Webinar Series
Avnet Electronics Marketing Americas and Freescale Semiconductor are offering a series of webinars. The online seminars will discuss how to make the most of quad core and dual core technologies for next-generation designs. The webcasts are designed for both system architects, and hardware and software engineers. The webinars will demonstrate the best ways to extract the performance potential available from a multicore system, which will enable engineers to design systems that can achieve impressive performance, at a manageable power envelope.
ADI Webinar: Fundamentals of Clocks and Clocking
Analog Devices will host a webinar about the fundamentals of clocks synthesis and distribution. The online seminar will discuss the types of phase-locked loops, the key features of these devices, and the applications they are designed for. The ADI webcast will take place tomorrow (January 18, 2012) at 12:00 pm EST. The webinar is ideal for students and engineers who are new to the field, and also for more experienced engineers looking for a refresher on this or any other part of the signal chain, design, and layout.
National Instruments Webinars: Optimize RF Measurements
National Instruments is offering a series of webinars on RF measurements. The webcasts will discuss the fundamentals of making RF measurements and focus on technique, best practices and increasing productivity with the industry’s latest tools. Each of the RF Measurements online seminars will be webcast twice each day, at 10am and 2pm GMT (subtract five hours for eastern standard time). The NI webinars will take place in March. The webcasts will also be available on demand after the series is complete.
Texas Instruments ZigBee RF4CE Remote Control Solution
Texas Instruments rolled out a new version of their ZigBee RF4CE remote control solution. The latest version supports the upcoming ZigBee Input Device (ZID) profile, which enables mouse-like pointing functionality, keyboard and gesture- and touch-based input controls for consumer electronics like TVs, set-top boxes and game consoles. TI’s ZigBee RF4CE solution includes the royalty-free RemoTI 1.3 protocol stack with sample application software, an ETSI-compliant and FCC-certified nano USB module, and an associated Advanced Remote Control development kit.
Real Intent Releases Meridian Clock Domain Crossing v4.0
Real Intent rolled out version four of their Meridian Clock Domain Crossing (CDC) verification software. The CDC verification tool can be used to achieve complete CDC sign-off for large and complex SoC designs from RTL to gate. The latest version includes improvements that make it the only software solution that enables complete CDC sign-off for over 100M gate SoC designs. Meridian CDC v4.0 is available now.
Ace Thought Multi-threaded Software Video Decoder Suite for ARM Cortex-A Processors
Ace Thought Technologies announced a multi-threaded software video decoder suite for ARM Cortex-A series of application processors. The multi-threaded video decoding suite enables high quality video solutions with HD resolution on Android smart-phones and tablets and on Apple iPhone and iPad devices. The scalable design of video decoder supports single, dual and quad-core application processors in a single library. Ace Thought Technologies’ video decoder suite is now available for licensing.
Ace Thought Multi-threaded Software Video Decoder Suite for ARM Cortex-A Processors »
Tensilica HiFi 3 Audio/Voice Digital Signal Processor IP Core
Tensilica introduced the HiFi 3 audio/voice digital signal processor intellectual property core for system-on-chip design. HiFi 3 DSP has an 80% increase in performance for the FFT (fast Fourier transform), FIR (finite impulse response), and IIR (infinite impulse response) math functions that are essential in audio pre- and post-processing. In addition, there’s a performance improvement of over 150% for most voice codecs compared to HiFi EP. The HiFi 3 has been delivered to lead customers. General availability will be in March.
Tensilica HiFi 3 Audio/Voice Digital Signal Processor IP Core »
Cadence Memory Controller and PHY IP Supports ONFI 3
Cadence Design Systems expanded its Flash IP offering to include support for the Open NAND Flash Interface (ONFI) 3.0 specification. According to Cadence, it is the first company to provide a combined ONFI 3 controller and PHY IP solution. The enhanced Flash IP streamlines SoC and system design while ensuring an optimized ONFI 3 implementation for maximum performance. The Cadence ONFI 3 memory controller and PHY IP are available now. The EDA company is also offering supporting verification IP (VIP) and memory models to ensure successful implementation.
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