ASSET InterTech has published an introductory tutorial on IJTAG. The tutorial explains how the new IEEE P1687 Internal JTAG (IJTAG) standard simplifies and automates the way chip designers manage embedded instruments that perform chip validation and characterization. The article describes the on-chip IJTAG architecture and the two languages defined by the standard, Instrument Connectivity Language (ICL) and Procedural Description Language (PDL). ICL defines the connections among embedded on-chip instruments and PDL is an extension of the Tcl (Tool Command Language) for developing validation, test and debug vectors for execution by IJTAG instruments.
Cadence Design Systems announced a new publication: Mixed-Signal Methodology Guide. The design methodology book provides an overview of the design, verification and implementation methodologies required for advanced mixed-signal designs. The book addresses the complex problems facing the mixed-signal design community. It features mixed-signal design experts from Boeing, Cadence, ClioSoft and Qualcomm. The Mixed-Signal Methodology Guide is intended for chip designers and CAD engineers.
National Instruments shared their 2012 Embedded Systems Outlook report. The report outlines National Instruments’ conclusions about the direction of the embedded systems market. The NI Embedded Systems Outlook lists technology and business-level trends that impact the development of next-generation embedded systems. The report provides information for a range of demanding embedded control and monitoring applications within industries such as energy, industrial control, life sciences and transportation.
National Instruments revealed their 2012 Automated Test Outlook, which is based on NI’s latest research on test and measurement technologies and methodologies. National Instruments’ 2012 Automated Test Outlook is based on input from academic and industry research, user forums and surveys, business intelligence and customer advisory board reviews. NI’s report provides information about trends affecting industries like consumer electronics, automotive, semiconductor, aerospace and defense, medical devices and communications.
ASSET InterTech recently published a white paper titled: Non-Intrusive Board Bring-Up: Software Tools Ensure Fast Prototype Bring-Up. The technical paper explains how non-intrusive software tools can bring up prototype circuit boards faster than legacy hardware-oriented tools like oscilloscopes and logic analyzers. The white paper reviews best practices for board bring-up and describes the benefits of integrating non-intrusive tools based on embedded instruments into an organization’s board bring-up framework.
Cadence Design Systems published a new book: Advanced Verification Topics. The 229-page book describes the latest techniques and methodologies for verifying today’s most complex IP and systems on chips (SoCs). It discusses topics like metric-driven verification of digital and mixed-signal designs, low-power verification using the UVM, multi-language UVM, and acceleration for the UVM. The Cadence book is ideal for aid verification engineers. It builds on a prior Cadence book, A Practical Guide to Adopting the Universal Verification Methodology (UVM).
AWR recently published a white paper about the benefits of co-simulation. The title of the white paper is: An Electrical-Thermal MMIC Design Flow. The technical paper uses an actual design example to discuss the effectiveness of co-simulation between AWR’s Microwave Office high-frequency design software and CapeSym’s SYMMIC thermal analysis tool. An X-band RF power amplifier/low-noise amplifier MMIC for a transceiver application was designed in Microwave Office software and thermal coupling and other issues between the two circuits on the single die were quickly remedied with SYMMIC to produce optimum results.
AWR has a new application note that explains how EDA tool integration benefits designers of circuits for 3G and 4G wireless systems. The app note describes the benefits of using AWR’s Microwave Office and Visual System Simulator (VSS) high-frequency design software with National Instruments’ LabVIEW signal processing software and virtual instruments. The title of the paper is Using LabVIEW in the AWR Design Environment To Design Complex Circuits for Wireless Applications.
AWR published an application note, High-Speed Serial Backplane – SERDES Design Example. The paper discusses the advantages of AWR Connected for Anritsu VectorStar for designing high-speed serial backplanes. AWR’s Microwave Office software is resident in the Anritsu VectorStar VNA. High-frequency design tools resident on a Vector Network Analyzer (VNA) provides a streamlined work flow that eliminates the time required to transfer measured data to a simulator running on a separate PC or workstation.
Vincotech has published an article titled, Mastering Power Modules: The advantages over discrete solutions. According to Vincotech, power modules have become the most convenient way of building a cost effective power supply system. Everything is optimized within the constraints of the particular module manufacturer. The designer can rest assured that the module will do everything electrically and mechanically that is specified, is guaranteed to work to tight specifications such as EMI, efficiency, load cycling and reliability and it is virtually off-the-shelf meaning that the all-important time to market pressure is minimized.