EDA Blog » Models, Simulations

Solido Design Automation Introduces High-Sigma Monte Carlo Meta-simulator

Ken Cheung — Tue, 24 Apr 2012 16:10:53 +0000

Solido Design Automation introduced their High-Sigma Monte Carlo (HSMC) meta-simulator. The Solido High-Sigma Monte Carlo meta-simulator solution features rapid analysis of yield/performance trade-offs for memory design. The High-Sigma Monte Carlo meta-simulator has already been successfully deployed at several companies because alternate methods were too slow, insufficiently inaccurate, and do not scale across the range of circuits memory designers need to analyze.

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PragmaDev Releases Version 4.3 of Real Time Developer Studio

Ken Cheung — Wed, 18 Apr 2012 15:52:34 +0000

PragmaDev rolled out version 4.3 of the Real Time Developer Studio. RTDS v4.3 includes 15 new features. According to PragmaDev, RTDS is the most complete model driven development and testing tool dedicated to real time and embedded applications. PragmaDev RTDS offers three levels of modeling and testing: informal, semi-formal, and fully formal.

Synopsys Develops Doubles Patterning Technology Model Extensions

Ken Cheung — Fri, 30 Mar 2012 18:24:19 +0000

Synopsys recently worked with the members of the Interconnect Modeling Technical Advisory Board (IMTAB) of the IEEE Industry Standards and Technology Organization (IEEE-ISTO). The collaboration has resulted in a parasitic variation modeling solution to address the effects of double patterning technology (DPT), targeted for use in 20-nanometer (nm) IC manufacturing.

Vishay Introduces PowerCAD Simulator Tool

Ken Cheung — Wed, 21 Mar 2012 17:10:34 +0000

Vishay Intertechnology announced their new PowerCAD simulation tool. The PowerCAD simulator is a free online tool that gives engineers a fast and convenient way to test and optimize DC/DC circuits built with Vishay Siliconix regulator ICs. Vishay’s PowerCAD simulator tool is ideal for both experienced analog and power designers as well as junior or digital designers with less experience in high-power, high-frequency voltage regulator design.

Docea Power Launches AceThermalModeler for Thermal Modeling

Ken Cheung — Thu, 08 Mar 2012 16:53:09 +0000

Docea Power introduced their AceThermalModeler (ATM) software. ATM is an easy to use tool for generating thermal models of System on Chips (SoCs), 3D ICs, Systems in Package (SiPs) or complete boards. With AceThermalModeler, system architects can perform both thermal steady state or coupled power and thermal analysis for dynamic application profiles running on different architecture configurations.

Synopsys Introduces Discovery Verification IP Family with VIPER Architecture

Ken Cheung — Mon, 27 Feb 2012 17:03:47 +0000

Synopsys introduced their Discovery Verification IP (VIP) family. Synopsys VIP is written entirely in SystemVerilog and is based on the new VIPER Architecture. It offers speeds and simplifies the verification of complex protocols and SoC designs. The Synopsys Discovery VIP family includes Protocol Analyzer, which is a unique prothonotary debug environment. Synopsys VIP is available for a variety of protocols, including USB 3.0, ARM AMBA AXI3, AXI4, ACE, HDMI, MIPI (CSI-2, DSI, HSI, etc.), Ethernet 40G/100G, PCI Express, SATA, and OCP.

HSPICE 2011.09 Speed-up Signal Integrity Simulation by Factor of Three

Ken Cheung — Thu, 26 Jan 2012 17:06:39 +0000

HSPICE 2011.09 has been integrated with Sigrity’s signal integrity analysis solution to accelerate signal integrity simulation of high-speed systems. The combined Synopsys and Sigrity tool features up to 3X faster simulation of signal and power integrity analysis of multi-gigahertz designs. In addition, HSPICE 2011.09 circuit simulator offers enhanced multi-core simulation performance, improved accuracy in statistical eye-diagram analysis, and new multi-core enabled S-parameter and W-element analysis.

White Paper: An Electrical-Thermal MMIC Design Flow

Ken Cheung — Tue, 13 Dec 2011 17:08:36 +0000

AWR recently published a white paper about the benefits of co-simulation. The title of the white paper is: An Electrical-Thermal MMIC Design Flow. The technical paper uses an actual design example to discuss the effectiveness of co-simulation between AWR’s Microwave Office high-frequency design software and CapeSym’s SYMMIC thermal analysis tool. An X-band RF power amplifier/low-noise amplifier MMIC for a transceiver application was designed in Microwave Office software and thermal coupling and other issues between the two circuits on the single die were quickly remedied with SYMMIC to produce optimum results.

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Mentor Graphics Offers JESD51-14 Compliant Thermal Characterization Solution

Ken Cheung — Mon, 12 Dec 2011 15:37:35 +0000

Mentor Graphics introduced an integrated solution for thermal characterization and simulation. The integrated solution features their T3Ster hardware test products with their FloTHERM software. The Mentor Graphics integrated T3Ster and FloTHERM solution helps accurate thermal simulation models. The thermal characterization solution is the only JESD51-14 compliant solution available on the market today. The integrated solution for efficient thermal package characterization is available now.

Mentor Questa and Veloce Verification Tools Support ARM Cortex A7, A15 MPCore

Ken Cheung — Thu, 10 Nov 2011 16:33:01 +0000

According to Mentor Graphics, their Questa and Veloce functional verification platforms have expanded their support for designs based on the latest ARM Cortex processors and AMBA bus interfaces. The Questa Codelink with support for ARM Cortex A7, Cortex A15, other Cortex A-family, Cortex R-family, and Cortex M-family processors and Questa Verification IP with support for AMBA4 ACE are available now.