'Models, Simulations' Category Archive

OMG UML Futures Roadmap Workshop

Posted by Ken Cheung in Events, Training, Models, Simulations on Thursday, June 18, 2009

OMG issued a call for participation in the UML Futures Roadmap Workshop. Anyone who has or plans to respond to the request for information (RFI) on the future development of UML is invited to participate. Responses to the RFI are due on August 17, 2009. The workshop to discuss these responses will be held immediately [...]

Synopsys System-Level Catalyst Program

Posted by Ken Cheung in Models, Simulations on Monday, June 8, 2009

Synopsys created the System-Level Catalyst Program to accelerate the adoption of system-level design and verification. The program is open to electronic design automation (EDA) vendors, intellectual property (IP) vendors, embedded software companies and service providers. The Synopsys System-Level Catalyst Program is designed to benefit mutual customers by advancing tool and model interoperability as well as [...]

AWR Connected for Rohde & Schwarz

Posted by Ken Cheung in Models, Simulations on Monday, June 8, 2009

AWR Connected for Rohde & Schwarz integrates the capabilities of R&S WinIQSIM2 simulation software within AWR’s Visual System Simulator (VSS) system analysis software. The complete range of digitally-modulated signals generated by R&S WinIQSIM2, along with those already present within VSS, ensure that the same real-world test signals can be used throughout the design cycle.

SystemRDL 1.0 Specification for IP Blocks

Posted by Ken Cheung in IP Cores, Models, Simulations on Monday, May 18, 2009

The SPIRIT Consortium released the SystemRDL specification. SystemRDL is a language for the design and delivery of registers to be used in IP blocks within electronic designs. The SystemRDL semantics support the entire life-cycle of registers from specification, model generation, and design verification to maintenance and documentation. Registers are not just limited to traditional configuration [...]

Berkeley Design Automation Analog FastSPICE 2009_05

Posted by Ken Cheung in Models, Simulations on Tuesday, May 12, 2009

Berkeley Design Automation announced the 2009_05 major release of the Analog FastSPICE (AFS) unified circuit verification platform. Within a single executable, the AFS Platform enables analog, mixed-signal, and RF design teams to verify what would otherwise require numerous simulators. The latest release of the AFS Platform offers foundry-certified true SPICE accuracy 5x-20x faster than traditional [...]

Tundra Semiconductor Serial RapidIO System Modeling Tool

Posted by Ken Cheung in Models, Simulations on Tuesday, May 12, 2009

Tundra Semiconductor introduced their new Serial RapidIO System Modeling Tool. The RapidIO System Modeling Tool enables designers using RapidIO to tap into the high-end features and benefits of RapidIO interconnect. The tool helps OEMs to improve system level performance, optimize architecture, and reduce power consumption. It is ideal for wireless, military, imaging, video infrastructure, and [...]

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