Open-Silicon, MIPS Technologies, Virage Logic Team on Test Chips
Open-Silicon, MIPS Technologies, and Virage Logic teamed to develop test chips showcasing the companies’ technologies for building high-performance processor-based systems. The companies achieved successful 65 nanometer (nm) silicon testing of a processor test chip at 1.1GHz, making it one of the fastest processors built in a 65nm ASIC. In addition, the companies are now working [...]
ARM Cortex-A5 MPCore Processor
The ARM Cortex-A5 MPCore processor is a small, lowest power ARM multicore processor capable of delivering the Internet. The Cortex-A5 processor is available as an extremely area- and power-efficient uniprocessor or up to a 4x multicore processor. The processor is ideal for ultra low cost handsets, feature phones, smart mobile devices, pervasive embedded devices, consumer [...]
Xtensa 8 Customizable Dataplane Processor Core for Embedded Control
Tensilica announced the Xtensa 8 customizable processor. The Xtensa 8 low-power dataplane processor core (DPU) starts at a size of only 15,000 gates, consuming less than 0.05mm squared in 40nm process technology. It is one of the smallest licensable controller cores on the market. With power dissipation starting at only 12 µW/MHz, it is also [...]
DesignWare DDR3/2 PHY, Controller IP Support 2133 Mbps, 1.35V DDR3L
Synopsys DesignWare DDR3/2 PHY and digital controller IP now supports the emerging 1866 and 2133 Megabits per second (Mbps) data rates currently being added to the JEDEC DDR3 standard. The DDR3/2 PHY also supports the Low Voltage DDR3L specification that runs at 1.35V, making the DesignWare IP ideal for power-conscious designs where the change from [...]
apt-X Lossless Audio Compression
apt-X Lossless, is APTX’s new, adaptive, lossless audio coding scheme. apt-X Lossless out-performs other lossless audio coding schemes — including FLAC, in a number of emerging application scenarios that depend upon the efficient transmission of high-quality audio over wireless channels and networks. apt-X Lossless audio codec is implemented as C and C++ code, and has [...]
MIPS Technologies and Sigma Designs Enable Android on HD Screens
MIPS Technologies and Sigma Designs have teamed together to bring the full high-definition (HD) experience to the Android platform. To enable Android to run on an HD screen rather than the small screen of a mobile handset, Sigma and MIPS enhanced the Android libraries and the MIPS architecture. Sigma Designs extended libraries within Android to [...]
Synopsys DesignWare IP for HDMI Interface
Synopsys rolled out silicon-proven High-Definition Multimedia Interface (HDMI) transmitter and receiver digital controllers and PHY IP solutions as part of their DesignWare IP portfolio. Synopsys’ DesignWare IP for the HDMI interface is compliant to the standard specification and supports High-bandwidth Digital Content Protection (HDCP). The IP is available in leading process technologies from 90nm down [...]
The SPIRIT Consortium Merges with Accellera
The organizations’ Boards of Accellera and The SPIRIT Consortium have agreed to a merger of the two Electronic Design Automation (EDA) industry organizations. The union improves the development of language-based and IP standards. Accellera is the leading standards organization developing language-based standards used by system, semiconductor, Intellectual Property (IP) and EDA companies. The SPIRIT Consortium [...]
Synopsys DesignWare SATA IP for SATA 6Gbps Data Transfer Rate
Synopsys unveiled the DesignWare SATA AHCI host and device digital controller IP for the latest SATA 6 Gigabit per second (Gbps) data transfer rate as defined in the Serial ATA (SATA) Revision 3.0 specification. This doubles the data rate of the previous (version 2.6) specification. DesignWare SATA IP speeds the deployment of the 6Gbps interface [...]
SystemRDL 1.0 Specification for IP Blocks
The SPIRIT Consortium released the SystemRDL specification. SystemRDL is a language for the design and delivery of registers to be used in IP blocks within electronic designs. The SystemRDL semantics support the entire life-cycle of registers from specification, model generation, and design verification to maintenance and documentation. Registers are not just limited to traditional configuration [...]
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