'FPGAs' Category Archive

Avnet Memec Actel Ultra Low Power Workshops

Posted by Ken Cheung in Events, Training, FPGAs on Tuesday, July 1, 2008

Avnet Memec recently announced their Actel Ultra-Low Power SpeedWay Design Workshop. The “how to” workshops provide hands-on experience to designers interested in leveraging Actel’s 5-microwatt IGLOO field-programmable gate arrays (FPGAs) for battery-operated and portable applications. Developed by Avnet’s factory-certified field application engineers (FAEs), the $49 Actel Ultra-Low Power workshops will be available through August 26, [...]

Across the Network - 2007.12.21

Posted by Ken Cheung in Embedded Star, FPGAs on Friday, December 21, 2007

Renesas RX Family of Microcontrollers
Renesas Technology recently announced a new CISC (Complex Instruction Set Computer) CPU architecture. The new architecture will improve code efficiency, processing performance, and power consumption. CISC microcontrollers (MCUs) based on the new architecture will be branded as the ‘RX’ family (RX stands for Renesas eXtreme). The new RX architecture will unifying [...]

Across the Network - 2007.12.14

Posted by Ken Cheung in Embedded Star, FPGAs on Friday, December 14, 2007

Altera Zero-Power MAX IIZ CPLDs
Altera Corporation (NASDAQ: ALTR) created the zero-power MAX® IIZ CPLD to address the power, package and price constraints of the portable applications market. Offering a resource advantage of up to six times the density and three times the I/Os compared to competing traditional macrocell-based CPLDs, MAX IIZ devices allow designers to [...]

Across the Network - 2007.12.07

Posted by Ken Cheung in Embedded Star, FPGAs on Friday, December 7, 2007

Summit SMB137 Programmable Battery Charger IC
Summit Microelectronics’ SMB137 programmable battery charger IC was designed for mobile consumer electronics. Dual (USB or AC/DC) inputs and outputs (System or Battery) with CurrentPath(TM) automatic arbitration allow system operation with any input source, any battery charge state, or even missing battery. Proprietary TurboCharge(TM) technology yields dramatic reductions in charge [...]

Tips for FPGA Timing Closure

Posted by Ken Cheung in Events, Training, FPGAs on Monday, March 26, 2007

Lattice is offering a webcast for FPGA designers. The one-hour event will take place Wednesday, March 28, 2007 at 11:00 am Pacific time (2:00 pm Eastern). Here’s the webinar blurb:

Overview
FPGA designers often find themselves squeezing every last bit of performance out of the least expensive, slowest speed grade, device available. In this presentation, Lattice Semiconductor [...]

Altera FPGAs Drive SDR at Software Radio Summit

Posted by Ken Cheung in Events, Training, FPGAs on Monday, February 19, 2007

At the Software Radio Summit, Altera will be featuring:

SDR waveform design flow for Software Communication Architecture (SCA), Common Object Request Broker Architecture (CORBA) and Serial RapidIO(TM) applications
Demos of WiMAX waveforms used by military systems developers

Altera’s SDR experts will discuss:

Addressing size, weight and power (SWaP) requirements with Altera’s new 65-nm Stratix(R) III FPGA family
Using Programmable Power [...]

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