EDA Blog » Events, Training

2012 Interdisciplinary Engineering Design Education Conference

Ken Cheung — Wed, 08 Feb 2012 16:19:59 +0000

The Interdisciplinary Engineering Design Education Conference (IEDEC) will take place on Monday, March 19, 2012 in Santa Clara,California. The conference provides a forum for sharing ideas, learning about developments in engineering design education, and interacting with professionals, experts, and colleagues in the field. IEDEC is intended for educators, mentors, engineers, managers, researchers, students, and representatives from industry and consortiums.

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Fully Depleted Workshop Covers Fully Depleted SOI Technology

Ken Cheung — Tue, 07 Feb 2012 16:39:03 +0000

The SOI Industry Consortium, CEA-Leti and Soitec are organizing a workshop on fully depleted silicon-on-insulator (FD-SOI) technology for advanced semiconductor architectures. The forum, which includes technical presentations and discussions, will take place in San Francisco, California on February 24, 2012. The event provides semiconductor IC designers and manufacturers with the latest information and insights on using FD-SOI wafers to produce more power efficient ICs at the performance required for applications in mobile and consumer electronics.

Apache Design Sponsors Two DesignCon Chip Package System Workshops

Ken Cheung — Fri, 27 Jan 2012 16:25:05 +0000

Apache Design, Inc. is sponsoring two Chip-Package-System (CPS) workshops at DesignCon 2012. The two in-depth technical workshops will provide designers with an open forum for exchanging the latest ideas and information on the most current technologies. In the interactive workshops, leading semiconductor companies and system houses will share perspectives and best practices on chip and package modeling, and system-level verification for signal integrity, power integrity, electromagnetic interference and thermal. The workshops are free. However, seating is limited and registration is required.

Webinar: Understanding the Basics of Parallel Wafer Level Reliability

Ken Cheung — Tue, 24 Jan 2012 16:35:32 +0000

Keithley Instruments, Inc. will host a one-hour webinar about parallel wafer level reliability testing. The free webcast will take place Thursday on January 26, 2012. It will be broadcast twice: 15:00 CET (9:00 AM EST) and 2:00 PM EST. The title of the online seminar is Understanding the Basics of Parallel Wafer Level Reliability. The webinar is ideal for engineers who are new to semiconductor reliability testing, test engineers who need to accelerate WLR testing, and QRA lab managers.

ADI Webinar: The Latest on Driving ADCs Differentially

Ken Cheung — Mon, 23 Jan 2012 16:29:20 +0000

Analog Devices will host a webinar titled, The Latest on Driving ADCs Differentially. There are two parts to this online seminar. The first part will take place Wednesday on January 25, 2012, at 12:00 pm EST. It will discuss how to select the right differential ADC driver for your design, and examine basic concepts. The second part of the webcast will take these basic concepts and use them to make the driver selection. The ADI webinar is ideal for all students and engineers who are new to the field, as well as those more experienced engineers looking for a refresher on this or any other part of the signal chain, design, and layout.

Introductory to Boundary Scan Workshop

Ken Cheung — Fri, 20 Jan 2012 10:06:11 +0000

XJTAG will host a free workshop. The event will explain how boundary scan testing can help board designers and engineers. The boundary scan workshop is designed to provide design, development, test, and production engineers with a practical hands-on introduction to boundary scan. Engineers will learn how boundary scan can be used right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits. The Introductory to Boundary Scan workshop will take place Wednesday, February 29, 2012 at XJTAG’s Cambridge headquarters.

Making the Most out of Multicore Webinar Series

Ken Cheung — Wed, 18 Jan 2012 17:13:31 +0000

Avnet Electronics Marketing Americas and Freescale Semiconductor are offering a series of webinars. The online seminars will discuss how to make the most of quad core and dual core technologies for next-generation designs. The webcasts are designed for both system architects, and hardware and software engineers. The webinars will demonstrate the best ways to extract the performance potential available from a multicore system, which will enable engineers to design systems that can achieve impressive performance, at a manageable power envelope.

ADI Webinar: Fundamentals of Clocks and Clocking

Ken Cheung — Tue, 17 Jan 2012 17:53:33 +0000

Analog Devices will host a webinar about the fundamentals of clocks synthesis and distribution. The online seminar will discuss the types of phase-locked loops, the key features of these devices, and the applications they are designed for. The ADI webcast will take place tomorrow (January 18, 2012) at 12:00 pm EST. The webinar is ideal for students and engineers who are new to the field, and also for more experienced engineers looking for a refresher on this or any other part of the signal chain, design, and layout.

National Instruments Webinars: Optimize RF Measurements

Ken Cheung — Mon, 16 Jan 2012 17:35:45 +0000

National Instruments is offering a series of webinars on RF measurements. The webcasts will discuss the fundamentals of making RF measurements and focus on technique, best practices and increasing productivity with the industry’s latest tools. Each of the RF Measurements online seminars will be webcast twice each day, at 10am and 2pm GMT (subtract five hours for eastern standard time). The NI webinars will take place in March. The webcasts will also be available on demand after the series is complete.

AWR High-Frequency Design Seminars

Ken Cheung — Tue, 03 Jan 2012 17:39:45 +0000

AWR Corporation, National Instruments and ICON Design Automation will conduct three seminars on high-frequency design. The seminars will include application centric talks and demonstration of AWR’s 2011 software platform, including Microwave Office high-frequency circuit design software, AXIEM 3D planar electromagnetic (EM) analysis software, and Visual System Simulator (VSS) system simulation software. The seminars will take January 17, 18 and 19, 2012 in India.