'EDA Tools' Category Archive

Agilent Target Modeling Package

Posted by Ken Cheung in EDA Tools on Monday, May 19, 2008

The Target Modeling Package, from Agilent Technologies Inc. (NYSE: A), is the first commercially available package that extracts models from semiconductor manufacturing process targets. The Target Modeling Package, which is an option for the 2008 release of Agilent's Integrated Circuit Characterization and Analysis Program (IC-CAP) software, enables designers to develop device-simulation models earlier in the [...]

Synopsys IC Compiler 2007.12

Posted by Ken Cheung in EDA Tools on Monday, May 19, 2008

The IC Compiler 2007.12 release, from Synopsys, Inc. (NASDAQ: SNPS), features the industry's first concurrent hierarchical design system. As designers migrate to smaller geometries, on-chip integration increases and design sizes mushroom, making hierarchical design almost mandatory. Current-generation design tools rely on a "plan-then-implement" flow which begins to break down in the face of these large [...]

Synopsys Proteus Pipeline Technology

Posted by Ken Cheung in EDA Tools on Thursday, May 15, 2008

Synopsys, Inc. (NASDAQ: SNPS) recently announced the capability to pipeline key manufacturing applications. The new Proteus Pipeline Technology provides a fully pipelined tapeout flow for maximum CPU utilization and is a major departure from serial manufacturing flows, in which a complete post-optical proximity correction (OPC) database must be available before the latter applications can be [...]

Magma Titan Mixed-Signal Design, Analysis, Verification Platform

Posted by Ken Cheung in EDA Tools on Wednesday, May 14, 2008

Titan(tm), from Magma® Design Automation Inc. (Nasdaq: LAVA), is the first full-chip mixed-signal design, analysis, and verification platform. Unlike other design solutions, Titan tightly integrates mixed-signal implementation with digital implementation, circuit simulation, transistor-level extraction, and verification. Titan Chip Finishing will be the first product to be released on this platform and is available now.
Because Titan [...]

Tanner EDA Announces HiPer PX and Verilog-A

Posted by Ken Cheung in EDA Tools on Tuesday, April 29, 2008

Tanner EDA recently announced HiPer PX and Verilog-A. Both are now part of Tanner Tools V13.0. HiPer PX reduces design errors and shortens the design verification process by generating highly accurate RC models for interconnect parasitics that include higher-order moments and are guaranteed to be accurate up to a user-defined signal frequency. HiPer PX is [...]

EEMBC Hypervisor Benchmark Suite

Posted by Ken Cheung in EDA Tools on Monday, April 28, 2008

The Embedded Microprocessor Benchmark Consortium (EEMBC) has formed a workgroup to develop a new hypervisor benchmark suite that will measure the contribution of hypervisors, also known as virtual machine managers, to performance, code size, and energy consumption in a wide range of embedded systems. EEMBC welcomes inquiries from companies that are interested in contributing to [...]

Toppan Photomasks DFM Tool

Posted by Ken Cheung in EDA Tools on Wednesday, April 23, 2008

Toppan Photomasks, Inc. recently introduced a new DFM tool that will shorten cycle time and reduce risk in chip design through an exception dispositioning process for identifying and analyzing defects and design errors. The tool was developed in collaboration with Anchor Semiconductor Inc. and is an extension of that company's NanoScope(tm) DFM platform. It allows [...]

Tela Innovations 45nm Design Solution

Posted by Ken Cheung in EDA Tools on Monday, April 21, 2008

Tela Innovations, founded by a team of experts in IP, design tools and process technology, plans to offer a design solution that uses pre-defined physical topologies, applicable for use in logic, embedded memory, analog and I/O functions. When synthesized and routed as part of the overall design, the solution enables a lithography-optimized layout. The resulting [...]

Synopsys Eclypse Low Power Solution

Posted by Ken Cheung in EDA Tools on Tuesday, April 15, 2008

Synopsys, Inc. (NASDAQ: SNPS) recently announced the Eclypse(tm) Low Power Solution, the industry's most comprehensive suite of proven system-level, verification, implementation and signoff tools, intellectual property (IP), methodologies and services for low power chip development. The Eclypse Low Power Solution simplifies advanced low power design and verification by combining and automating a wide array of [...]

Questa Multi-View Verification Components and inFact Testbench

Posted by Ken Cheung in EDA Tools, Models, Simulations, Test Solution on Tuesday, April 8, 2008

Mentor Graphics Corporation (Nasdaq: MENT) recently announced the Questa® Multi-view Verification Components product and the inFact(tm) intelligent testbench automation tool – two new solutions that use breakthrough technologies to speed up verification and drastically improve verification coverage of today's SoC (System on Chip) designs. inFact is available now and Questa MVCs will be available in [...]

Enhanced Open Verification Methodology

Posted by Ken Cheung in EDA Tools on Thursday, April 3, 2008

Cadence Design Systems, Inc. (NASDAQ: CDNS) and Mentor Graphics Corp. (NASDAQ: MENT) recently enhanced the source-code library and user documentation for the Open Verification Methodology (OVM), the industry's first open, interoperable SystemVerilog verification methodology. The enhancements are the result of feedback from the growing user community. Distributed under the standard open-source Apache(tm) 2.0 license, the [...]

Ericsson U380 Mobile Platform

Posted by Ken Cheung in EDA Tools, Wireless on Monday, March 31, 2008

Ericsson (NASDAQ:ERIC) recetnly announced the U380 mobile platform, which delivers a true mobile Internet experience. The U380 is an integrated and verified one-chip HSPA platform, supporting all major Open Operating Systems (OS) on the market, and the first product based on the Open OS collaboration with Texas Instruments (TI) (NYSE: TXN). The U380 platform is [...]

BarracudaDrive Application Server for Linksys NSLU2

Posted by Ken Cheung in EDA Tools on Thursday, March 20, 2008

Real Time Logic has released a free version of the BarracudaDrive application server for Linksys NSLU2 and the Unslung Linux firmware. BarracudaDrive is a product developed by using the Barracuda Embedded Web Server SDK. The Barracuda Embedded Web Server is used by many companies making security access products, monitoring equipment, and industrial automation.
Developers can customize [...]

Optical Proximity Correction, Verification 200x Faster

Posted by Ken Cheung in EDA Tools on Wednesday, March 19, 2008

Gauda, Inc. recently announced a breakthrough technology that can accelerate OPC (optical proximity correction) and OPV (optimal proximity verification) up to 200 times faster than traditional solutions, running on today's desktop computers. Gauda achieved this acceleration without any specialized hardware or FPGAs, but by developing a new breed of algorithms utilizing CPUs and GPUs (graphical [...]

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