'EDA Tools' Category Archive

Patent for Automatic Routing Nets According to Current Density Rules

Posted by Ken Cheung in EDA Tools on Thursday, July 2, 2009

Pulsic Limited has been granted US Patent #11383658 for a unique routing innovation incorporated in their physical chip design software. The patent, titled Automatic routing nets according to current density rules, protects unique technology incorporated in Pulsic’s UniRoute automated router. By taking into account the current required by the individual branches in a net, UniRoute [...]

Soft Control Accelerator for Soft Control Architecture

Posted by Ken Cheung in EDA Tools on Wednesday, July 1, 2009

IntervalZero and Adeneo Embedded have teamed together to create Soft-Control Accelerator. The joint product offering helps Embedded OEMs migrate to a Soft-Control Architecture. Soft-Control Accelerator features an IntervalZero RTX 2009 SMP software development kit with a year of support and a three-day, on-site Adeneo services engagement that can be customized to meet the OEMs’ needs. [...]

Forte Design Systems Cynthesizer 3.6 SystemC Synthesis

Posted by Ken Cheung in EDA Tools on Monday, June 29, 2009

Forte Design Systems rolled out the version 3.6 of Cynthesizer SystemC synthesis software for hardware and electronic system level (ESL) design. The new Cynthesizer features SystemC 2.2 support, tools for partitioning complex hierarchical systems, automated generation of complex interfaces, enhanced control-based design support, memory support upgrades, and scalability improvements. Cynthesizer comes standard with Forte’s transaction [...]

Mentor Graphics Catapult C Synthesis 2009a Release

Posted by Ken Cheung in EDA Tools on Monday, June 29, 2009

The Catapult C Synthesis 2009a release, from Mentor Graphics, features support for control logic and manage low power design requirements, thus enabling full-chip high-level synthesis (HLS). The enhancement enables designers to use pure ANSI C++ for both algorithmic blocks and control logic blocks. The Catapult C Synthesis tool automatically generates control and algorithmic RTL multi-block [...]

Sonics MemMax DRAM System

Posted by Ken Cheung in EDA Tools on Thursday, June 25, 2009

The Sonics MemMax DRAM System is a pre-configured, verified, and silicon-proven IP block that can be integrated into a variety of SoCs quickly and easily. The IP block is a combination of Sonics’ advanced memory scheduler and Synopsys’ DesignWare DDR Protocol Controller IP. The combination results in an IP block that is optimized for maximum [...]

LDRA Tool Suite Integrates with the Analog Devices VisualDSP++

Posted by Ken Cheung in EDA Tools on Thursday, June 25, 2009

LDRA has integrated their tool suite with the Analog Devices VisualDSP++ (VDSP++) software development environment. VDSP++ creates a software development environment for engineers working with Analog’s embedded processors. The LDRA tool suite offers automated software testing and verification across all stages of software development. The integration enables seamless testing of user code at both the [...]

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