Data Translation launched their Signal Processing Library for .NET. The hardware-independent software library contains DSP algorithms that can be seamlessly integrated into many measurement applications, such as sound and vibration. The Signal Processing Library for .NET (SP8075-KEY) is available royalty-free under a download license for $995. It may be distributed widely as part of any user application.
Tensilica announced their HiFi Mini DSP IP core. According to the company, the digital signal processor core is the smallest, lowest power DSP IP core supporting always listening voice trigger and speech command modes. The HiFi Mini DSP IP core will be available in March 2013. The core is ideal for smartphones, tablets, appliances, and automotive applications.
Tensilica introduced their ConnX BBE32UE digital signal processor IP core. The ConnX BBE32UE DSP core is ideal for baseband SOC (system-on-chip) designs. Coupled with Tensilica Baseband Dataplane processors (DPUs), the new core can help engineers realize a fully software programmable, flexible modem for LTE-Advanced user equipment category 7 PHY (Layer 1) in less than 200mW (28 nm HPL process). The ConnX BBE32UE is available now for early access customers. General product release is planned for the third quarter of 2012.
Tensilica introduced the HiFi 3 audio/voice digital signal processor intellectual property core for system-on-chip design. HiFi 3 DSP has an 80% increase in performance for the FFT (fast Fourier transform), FIR (finite impulse response), and IIR (infinite impulse response) math functions that are essential in audio pre- and post-processing. In addition, there’s a performance improvement of over 150% for most voice codecs compared to HiFi EP. The HiFi 3 has been delivered to lead customers. General availability will be in March.
Texas Instruments introduced the TMDX5502EZDSP and TMDX5509EZDSP development tools for C5502 and C5509A digital signal processors. The TI eZdsp development tools are credit card sized and do not require cables. The C5502 eZdsp development tool features a range of integrated peripheral devices, an XDS100v2 emulator, a complete version of CCS IDE v4 and access to chip support, optimized DSP, image and telecom library with source code. In addition to the features of the C5502 tool, the C5509A eZdsp development tool also includes a USB1.1 slave port and a microSD card slot. The TMDX5502EZDSP is available now for $89 (USD) and the TMDX5509EZDSP is priced at $99 and is also available now.
The IntegrIT NatureDSP Math library is now available for Tensilica’s HiFi Audio DSPs for system-on-chip (SOC) design. The NatureDSP Math library simplifies the software development process for design teams that want to port software codecs to the Tensilica HiFi Audio DSP. The IntegrIT Nature DSP Signal+ is a collection of signal processing routines needed for implementation of typical digital signal processing functions which efficiently utilize the HiFi Audio DSP architecture. It contains highly optimized routines for filtering, FFT, matrix, trigonometric and other math operations.
GE Intelligent Platforms introduced AXISLib-GPU, which is a library of optimized math and DSP functions that supports the rapid development of multiprocessing applications that take advantage of the power of GPGPU (general purpose processing on a graphics processing unit) technology. AXISLib-GPU supports the development and speeds the deployment of high performance DSP and multiprocessing applications on GE’s NVIDIA CUDA-enabled GPGPU platforms (such as the IPN250, NPN240 and GRA111). AXISLib-GPU can operate in a standalone mode or as an integral software module within the AXIS Advanced Multiprocessor Integrated Software environment.
Tensilica’s HiFi Audio DSP family of IP (intellectual property) cores for SOC (system-on-chip) design now features the Free Lossless Audio Codec (FLAC) decoder. FLAC is an audio format similar to MP3, but lossless so the audio is compressed without any loss in quality. It is not a proprietary format. As a result, FLAC is not encumbered by patents, and has an open-source reference implementation. Tensilica’s FLAC decoder supports both stereo and multi-channel formats.
VLSI Solution introduced the VSIDE integrated development environment for the V16/40-bit VSDSP digital signal processor family. VSIDE offers a complete set of development utilities, including an optimizing ANSI-C compiler, assembler, linker, and profiler. All programs are integrated into a simple-to-use, easy-to-learn package running on a PC / Windows XP or Vista platform.
Tensilica announced Revision C of the ConnX 545CK 8-MAC (multiply-accumulate) VLIW (very long instruction word) DSP (digital signal processor) core for system-on-chip (SOC) designs. In 65GP optimized for high speed, the ConnX 545CK delivers over 600 MHz operation. The third generation dataplane processor (DPU) core deliver up to 20% faster clock speed, 11% smaller die and up to 30% lower power consumption. The ConnX 545CK Revision C is available now.