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	<title>EDA Blog &#187; Components</title>
	<atom:link href="http://edablog.com/category/components/feed/" rel="self" type="application/rss+xml" />
	<link>http://edablog.com</link>
	<description>Electronic Design Automation Software, Hardware, and Components</description>
	<lastBuildDate>Wed, 08 Feb 2012 16:19:59 +0000</lastBuildDate>
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		<title>Kilopass ROM-it! ROM Conversion Option</title>
		<link>http://edablog.com/2009/07/31/one-time-programmable-memory/</link>
		<comments>http://edablog.com/2009/07/31/one-time-programmable-memory/#comments</comments>
		<pubDate>Fri, 31 Jul 2009 10:13:34 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/?p=3506</guid>
		<description><![CDATA[ROM-it!, from Kilopass Technology, is a read only memory (ROM) conversion option for their One-Time Programmable Memory (OTP) product lines. ROM-it! will eliminate programming test cost for OTP. ROM-it! enables conversion from OTP to ROM with no additional area overhead. The antifuse technology supports a ROM conversion without increasing the bitcell area. All the existing [...]]]></description>
			<content:encoded><![CDATA[<p>ROM-it!, from Kilopass Technology, is a read only memory (ROM) conversion option for their One-Time Programmable Memory (OTP) product lines. ROM-it! will eliminate programming test cost for OTP. ROM-it! enables conversion from OTP to ROM with no additional area overhead. The antifuse technology supports a ROM conversion without increasing the bitcell area. All the existing products can be converted to ROM without altering the aspect ratio. Engineers using XPM can convert their solution today.</p>
<p><p>Read more: <a href="http://edablog.com/2009/07/31/one-time-programmable-memory/">Kilopass ROM-it! ROM Conversion Option</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://edablog.com/2009/07/31/one-time-programmable-memory/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://edablog.com/2009/07/31/one-time-programmable-memory/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/edablog">Twitter @edablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2009 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : EDA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		<title>JESD209-2 LPDDR2 Low Power Memory Device Standard</title>
		<link>http://edablog.com/2009/04/02/jedec-sdram-nvm/</link>
		<comments>http://edablog.com/2009/04/02/jedec-sdram-nvm/#comments</comments>
		<pubDate>Thu, 02 Apr 2009 17:27:41 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/?p=2641</guid>
		<description><![CDATA[JEDEC Solid State Technology Association published the JESD209-2 LPDDR2 Low Power Memory Device Standard. The new standard offers advanced power management features, a shared interface for nonvolatile memory (NVM) and volatile memory (SDRAM), and a range of densities and speeds. The standard will enhance the design of such products as smart phones, cell phones, PDAs, [...]]]></description>
			<content:encoded><![CDATA[<p>JEDEC Solid State Technology Association published the JESD209-2 LPDDR2 Low Power Memory Device Standard. The new standard offers advanced power management features, a shared interface for nonvolatile memory (NVM) and volatile memory (SDRAM), and a range of densities and speeds. The standard will enhance the design of such products as smart phones, cell phones, PDAs, GPS units, handheld gaming consoles, and other mobile devices by enabling increased memory density, improved performance, smaller size, overall reduction in power consumption as well as a longer battery life.</p>
<p><p>Read more: <a href="http://edablog.com/2009/04/02/jedec-sdram-nvm/">JESD209-2 LPDDR2 Low Power Memory Device Standard</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://edablog.com/2009/04/02/jedec-sdram-nvm/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://edablog.com/2009/04/02/jedec-sdram-nvm/" height="61" width="51" /></a></p>
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		<title>Embedded SD Standard</title>
		<link>http://edablog.com/2008/12/10/sda-card/</link>
		<comments>http://edablog.com/2008/12/10/sda-card/#comments</comments>
		<pubDate>Wed, 10 Dec 2008 17:05:16 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/?p=1949</guid>
		<description><![CDATA[The SD Card Association (SDA) recently introduced the Embedded SD standard for storage devices in November. The Embedded SD specification extends the widely adopted, market-proven SD interface to embedded storage, doubling device storage potential and easing platform design in mobile handsets and consumer electronics devices. The Embedded SD standard regulates the specifications of SD interface-based [...]]]></description>
			<content:encoded><![CDATA[<p>The SD Card Association (SDA) recently introduced the Embedded SD standard for storage devices in November. The Embedded SD specification extends the widely adopted, market-proven SD interface to embedded storage, doubling device storage potential and easing platform design in mobile handsets and consumer electronics devices. The Embedded SD standard regulates the specifications of SD interface-based embedded flash devices, easing the integration of storage devices and avoiding market fragmentation in the mobile and CE industries.</p>
<p>As next-generation mobile handsets and CE devices demand high-capacity embedded storage and flash management solutions, Embedded SD simplifies system engineering by leveraging well-known SD standards. It allows all removable, embedded storage devices and input/output (I/O) peripherals to utilize the same common interface. Embedded SD separates flash management from the host and provides manufacturers and consumers with the flexibility of up to 32 GB scalable high-capacity on-board memory, plus 32 GB of removable memory with any SD High-Capacity memory card.</p>
<p>The Embedded SD specification defines the mechanical and electrical framework of the new embedded form factor and is also focused on enabling advanced functionality in embedded storage devices. Embedded SD devices offer a smart system solution with a smooth migration path from legacy designs, reduced design complexity and support for code, applications and user data storage.</p>
<p>To speed adoption of Embedded SD, support of boot functionality requires only minor changes in the host ROM code of currently mass deployed baseband, application and multimedia processors with minimal additional changes to block device driver to support the additional functionality of embedded SD.</p>
<p><b>Embedded SD Standard</b></p>
<ul>
<li><b>Fully Compatible with SD standard</b><br />
Embedded SD is fully compatible with the industry leading SDHC (SD 2.00) interface, ensuring a seamless migration from current SD to Embedded SD designs</li>
<li><b>Both 3.3V and 1.8V Power Supplies</b><br />
Supported for both flash and I/O power sources</li>
<li><b>Boot from Embedded SD</b><br />
Reliable and secure storage of boot code on an Embedded SD device reduces the number of memory components in a design, as well as the number of busses required, enabling more efficient designs</li>
<li><b>Flexible Partition Mechanism</b><br />
Allows multiple physical partitions accommodating varied data sources such as boot code, OS, applications and multimedia content with customizable levels of protection for each partition. Original equipment manufacturers, mobile network operators and content providers gain optimal flexibility and control to configure the Embedded SD device for different usages and data types</li>
<li><b>Protection Mechanism</b><br />
Flexibility to separately configure each physical partition with different read and write/erase protection modes</li>
<li><b>Data Robustness</b><br />
Optional configuration of each physical partition of the Embedded SD device, including full immunity to power failure and protection of critical data (boot code, operator data, etc.)</li>
<li><b>Power-Saving Sleep Mode</b><br />
Option to customize power needs and reduce power consumption and boost battery life</li>
</ul>
<p>More info: <a href="http://www.sdcard.org">SD Card Association</a></p>
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		<title>CFast Specification 1.0</title>
		<link>http://edablog.com/2008/12/03/compactflash-cfa/</link>
		<comments>http://edablog.com/2008/12/03/compactflash-cfa/#comments</comments>
		<pubDate>Wed, 03 Dec 2008 05:30:32 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/?p=1907</guid>
		<description><![CDATA[The CompactFlash Association (CFA) recently released revision 1.0 of the CFast specification. The current CompactFlash PATA (parallel ATA) interface provides up to a 133MB/second interface data rate. The SATA interface will provide interface data rates up to 3Gb/sec as well as compatibility with the SATA disk drive interfaces that are increasingly being used. The CF+ [...]]]></description>
			<content:encoded><![CDATA[<p>The CompactFlash Association (CFA) recently released revision 1.0 of the CFast specification. The current CompactFlash PATA (parallel ATA) interface provides up to a 133MB/second interface data rate. The SATA interface will provide interface data rates up to 3Gb/sec as well as compatibility with the SATA disk drive interfaces that are increasingly being used.</p>
<p>The CF+ &#038; CompactFlash and CFast standards ensure that today&#8217;s and tomorrow&#8217;s embedded systems, single board computers, multi-mega pixel DSLR cameras, and other devices will be compatible with faster and even higher capacity CF and CFast cards, as they become available.</p>
<p>CompactFlash cards are currently available up to 48GB with sustained data rates of 45MB/sec. and provide the dominant SSD flash storage solution for embedded systems, single board computers, multi-mega pixel DSLR cameras, and other devices.</p>
<p>In addition to CompactFlash data storage cards, there are CF cards that provide I/O capability. VGA, Ethernet, modem, serial, parallel, digital phone, GSM, Bluetooth, Ethernet wireless, wand &#038; laser barcode scanners, finger print scanners, TV and GPS CF+ cards are all available.</p>
<p>More info: <a href="http://www.compactflash.org">CompactFlash</a></p>
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		<title>Jameco Slashes Prices on Electronic Components</title>
		<link>http://edablog.com/2008/11/20/jameco/</link>
		<comments>http://edablog.com/2008/11/20/jameco/#comments</comments>
		<pubDate>Thu, 20 Nov 2008 05:24:37 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/?p=1857</guid>
		<description><![CDATA[Jameco Electronics has reduced prices from 10% to 40% on more than 80,000 electronic components. Jameco&#8217;s price reductions are on top of its tiered pricing strategy, which offers customers three distinct pricing options: (1) name-brand, (2) house-brand, and (3) factory-overrun electronic components. All Jameco products are backed by the company&#8217;s low-price guarantee. If customers ever [...]]]></description>
			<content:encoded><![CDATA[<p>Jameco Electronics has reduced prices from 10% to 40% on more than 80,000 electronic components. Jameco&#8217;s price reductions are on top of its tiered pricing strategy, which offers customers three distinct pricing options: (1) name-brand, (2) house-brand, and (3) factory-overrun electronic components. All Jameco products are backed by the company&#8217;s low-price guarantee. If customers ever find a published price that&#8217;s lower than an identical Jameco product, Jameco will not only meet that price, but beat it by an additional 10 percent, right down to the company&#8217;s cost.</p>
<p>All Jameco products also come with a 30-day return policy and a 90-day Jameco warranty against any manufacturing defects. The Jameco house-brand products &mdash; the Jameco ValueProT line of professional-grade passive, electromechanical and interconnect products; the Jameco ReliaProT line of reliable power supplies and motors; and the Jameco BenchProT line of professional-grade workbench tools &mdash; all come with a one-year warranty.</p>
<p>Jameco is a low-price leader for electronic components like digital and analog semiconductors, interconnects, passives, electromechanical, fans, power supplies, prototype/design, test equipment and tools.</p>
<p>More info: <a href="http://www.Jameco.com">Jameco Electronics</a></p>
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		<title>DDR PHY Interface Specification 2.0</title>
		<link>http://edablog.com/2008/08/19/dfi2/</link>
		<comments>http://edablog.com/2008/08/19/dfi2/#comments</comments>
		<pubDate>Tue, 19 Aug 2008 04:03:37 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/?p=1636</guid>
		<description><![CDATA[Version 2.0 of the DFI specification was recently released. The collaborative technical working group delivered several improvements and enhancements in this latest version of the DFI specification. This version of the specification extends support to include DDR1, DDR2, Mobile, and DDR3 memory; adds read, write, and gate training interfaces; and improves upon the interoperability features [...]]]></description>
			<content:encoded><![CDATA[<p>Version 2.0 of the DFI specification was recently released. The collaborative technical working group delivered several improvements and enhancements in this latest version of the DFI specification. This version of the specification extends support to include DDR1, DDR2, Mobile, and DDR3 memory; adds read, write, and gate training interfaces; and improves upon the interoperability features between the memory controller and a DDR PHY. Chip architects, memory controller vendors, and PHY providers can utilize the new specification to speed their DDR memory system design and integration, and reduces the significant verification costs.</p>
<p>The DFI specification 2.0 is available through a click-thru license. The official version of the specification has been based on the 1.0 foundation of the common interface between DDR-DRAM memory controller logic designs and DDR DRAM physical interface (DDR PHY) designs. This specification allows designers a standard that has wide industry acceptance and ensures that the controller and PHY will work optimally together and no changes will be required to the hardened logic, resulting in reduced cost, time-to-market, and increasing reusable system IP.</p>
<p>More info: <a href="http://www.ddr-phy.org">DFI Specification</a></p>
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		<title>Serial Port Memory Technology Working Group</title>
		<link>http://edablog.com/2008/07/23/spmt-mobile-handset/</link>
		<comments>http://edablog.com/2008/07/23/spmt-mobile-handset/#comments</comments>
		<pubDate>Wed, 23 Jul 2008 16:02:49 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/?p=1610</guid>
		<description><![CDATA[ARM, Hynix Semiconductor, Inc., LG Electronics, Samsung Electronics, Silicon Image, Inc., Sony Ericsson Mobile Communications AB, and ST Microelectronics formed the Serial Port Memory Technology working group to create an open standard for next-generation memory interface technology targeting mobile devices. This first-of-its-kind memory standard for dynamic random access memory (DRAM) will enable extended battery life, [...]]]></description>
			<content:encoded><![CDATA[<p>ARM, Hynix Semiconductor, Inc., LG Electronics, Samsung Electronics, Silicon Image, Inc., Sony Ericsson Mobile Communications AB, and ST Microelectronics formed the Serial Port Memory Technology working group to create an open standard for next-generation memory interface technology targeting mobile devices. This first-of-its-kind memory standard for dynamic random access memory (DRAM) will enable extended battery life, bandwidth flexibility, significantly reduced pin count, lower power demand and multiple ports by using a serial interface instead of the parallel interface commonly used in today&#8217;s memory devices. This technology will be ideal for mobile handset manufacturers and consumers because it will dramatically extend battery life while allowing high- performance media-rich applications that will be the norm on next-generation mobile phones.</p>
<p>The SPMT Working Group&#8217;s goal is to define a technology that reduces pin count by a minimum of 40 percent, provides a bandwidth range from 3.2GB/s to 12.6GB/s and higher, reduces input/output power by 50 percent or more to extend battery life, and provides the ability to use either a single port or multiple ports into a single SPMT-enabled memory chip. While initially targeted at the mobile handset market, the technology will also be in demand by other markets such as portable media players, digital still cameras and handheld gaming devices.</p>
<p>The Working Group came together to pioneer a new technology to meet the growing demand of manufacturers to extend battery life and increase the performance and functionality of handsets while reducing system cost for the devices. This is in response to mobile service providers&#8217; demand for solutions enabling them to give consumers more data-intensive, media-rich capabilities such as video (including high-definition video), GPS, gaming, Internet access, e-mail, multimedia applications and music at a competitive price. The SPMT Working Group has been meeting since the third quarter of 2007 and is expected to organize a formal consortium later this year consisting of handset, memory and system-on-chip manufacturers and semiconductor IP providers with the intention of bringing the SPMT specification to the industry by the end of 2008.</p>
<p>As DRAM content continues to grow for the new generation of mobile devices, it is becoming increasingly difficult for current technologies to keep up with the demand for longer battery life, greater bandwidth and design flexibility while reducing overall system cost,&#8221; said Jim Venable, head of Silicon Image&#8217;s Advanced Memory Technology Products. &#8220;Serial Port Memory Technology will be a game-changer in the way mobile device developers design new products that deliver significantly better battery life and a higher- quality user experience.</p>
<p>More info: <a href="http://www.spmt.com">Serial Port Memory Technology (SPMT)</a></p>
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		<title>PureDepth Multi-Layer Display</title>
		<link>http://edablog.com/2008/05/08/puredepth-mld/</link>
		<comments>http://edablog.com/2008/05/08/puredepth-mld/#comments</comments>
		<pubDate>Thu, 08 May 2008 23:10:09 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/2008/05/08/puredepth-mld/</guid>
		<description><![CDATA[PureDepth, based in Redwood Shores CA, has developed what they call Multi-layer Display (MLD) technology. PureDepth Multi-Layer Display (MLD[TM]) technology brings real depth to display devices of any size, by layering multiple LCD screens on top of each other and removing interference with an interstitial component. The visual effect is stunning and the possibilities are [...]]]></description>
			<content:encoded><![CDATA[<p>PureDepth, based in Redwood Shores CA, has developed what they call Multi-layer Display (MLD) technology. PureDepth Multi-Layer Display (MLD[TM]) technology brings real depth to display devices of any size, by layering multiple LCD screens on top of each other and removing interference with an interstitial component. The visual effect is stunning and the possibilities are open for computer monitors, televisions, location-based entertainment and mobile devices.</p>
<div align="center"><a href="http://edablog.com/"><img src="http://edablog.com/primages/2008/Multi-Layer-Display.jpg" width="468" height="213" alt="PureDepth Multi-Layer Display" border="0" /></a></div>
<p>Essentially, the idea is to build displays that are in fact two or more layers of LCD panel that share a common back-light source &mdash; as data is displayed on the various layers, a depth effect is created. Optical correlation, compatibility and interferences between display layers are managed via patented interstitial elements within the optical stack of a MLD. Each display panel receives independent control signals and, through the coordination of the images, a true multi-layer visual display is presented to the user. The content of the images, combined with smart coordination can provide remarkable and eye-catching results for static images and even more so with full in-motion video sequences.</p>
<p>The technology lends itself to a broad array of applications. PureDepth is currently actively developing several of these. The company has signed agreements with Samsung for development of displays and mobile handsets, and is also collaborating with SANYO on mobile handsets, gaming technology, and automobile electronics (including in-car navigation).</p>
<p>PureDepth expects to see first products &mdash; in gaming &mdash; hit the streets during 2008, with more products and applications to follow shortly thereafter.</p>
<p>More info: <a href="http://www.puredepth.com/">PureDepth</a></p>
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		<title>Renesas, Sharp, Powerchip Form Joint Venture</title>
		<link>http://edablog.com/2008/04/02/drivers-controllers/</link>
		<comments>http://edablog.com/2008/04/02/drivers-controllers/#comments</comments>
		<pubDate>Thu, 03 Apr 2008 00:50:56 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/2008/04/02/drivers-controllers/</guid>
		<description><![CDATA[Renesas Technology Corp., Sharp Corporation, and Powerchip Semiconductor Corp. have established a joint venture that specializes in drivers and controllers for small- and mid-size LCDs. Consolidating the business operations of Renesas Technology and Sharp in this field, the new company will engage in the design, development, sales, and marketing of LCD drivers and controllers. Business [...]]]></description>
			<content:encoded><![CDATA[<p>Renesas Technology Corp., Sharp Corporation, and Powerchip Semiconductor Corp. have established a joint venture that specializes in drivers and controllers for small- and mid-size LCDs. Consolidating the business operations of Renesas Technology and Sharp in this field, the new company will engage in the design, development, sales, and marketing of LCD drivers and controllers. Business operations related to these products will be transferred to the new company starting April 2008 for Renesas Technology, and by the end of fiscal 2008 for Sharp. The new company started full operations on April 1, 2008.</p>
<p>In recent years, the market for LCD panels has grown exponentially, due to the growing popularity of LCD TVs, mobile phones with higher quality displays, and the use of LCDs in products such as car navigation systems and game consoles. A market study predicts near two-digit growth for the worldwide market. The market growth for small- and mid-size LCDs is expected to be especially strong because of the emergence of mobile phones. More mobile phones are required to support sophisticated multimedia capabilities such as built-in digital cameras and reception of TV programs to enable the mobile phones&#8217; advanced functionality and higher picture quality standard. In addition, the demand for mobile phones is also accelerating in emerging markets such as the BRICs economies, notably China and India. As these conditions generate heavy demand for integration of driver and controller functions for small- and mid-size LCDs, market competition is expected to become increasingly fierce due to intensifying price competition and the emergence of fabless manufacturers overseas.</p>
<p>To respond to such growing competition, the three companies have agreed to establish a joint venture in order to realize improved cost competitiveness, increased design capabilities, more attractive products, and expanded sales. The new company is a fabless semiconductor manufacturer focusing on design, development, sales, and marketing. Powerchip Semiconductor, one of the investors in the new company, will handle most of the actual production, using its ultrafine process technology and production cost competitiveness. By maximizing its strengths as a fabless semiconductor manufacturer, the new company will strive to achieve stable growth in the field of drivers and controllers for small- and mid-size LCDs.</p>
<p>More info: <a href="http://www.renesas.com">Renesas Technology</a> | <a href="http://sharp-world.com/">Sharp</a> | <a href="http://www.psc.com.tw/english/index.jsp">Powerchip Semiconductor</a></p>
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		<title>STMicroelectronics STLC2690 Bluetooth and FM Radio Transceiver SoC</title>
		<link>http://edablog.com/2008/03/24/st-cellular-phone/</link>
		<comments>http://edablog.com/2008/03/24/st-cellular-phone/#comments</comments>
		<pubDate>Mon, 24 Mar 2008 23:52:50 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Components]]></category>

		<guid isPermaLink="false">http://edablog.com/2008/03/24/st-cellular-phone/</guid>
		<description><![CDATA[STMicroelectronics (NYSE:STM) recently introduced its 4th-generation Bluetooth&#174;/FM Radio combo solution, which meets the demanding integration and cost requirements of the cellular phone market. By combining Bluetooth wireless personal-area-network functionality with an FM radio transceiver in a single 65nm chip, the STLC2690 offers leading-edge integration and performance. The new chip from is manufactured in ST&#8217;s low-leakage [...]]]></description>
			<content:encoded><![CDATA[<p>STMicroelectronics (NYSE:STM) recently introduced its 4th-generation Bluetooth&reg;/FM Radio combo solution, which meets the demanding integration and cost requirements of the cellular phone market. By combining Bluetooth wireless personal-area-network functionality with an FM radio transceiver in a single 65nm chip, the STLC2690 offers leading-edge integration and performance. The new chip from is manufactured in ST&#8217;s low-leakage ultra-low-power 65nm RFCMOS technology. STLC2690 samples are already being evaluated by several leading handset manufacturers and volume mass production is scheduled for the second half of 2008.</p>
<div align="center"><a href="http://edablog.com/"><img src="http://edablog.com/primages/2008/STMicroelectronics-STLC2690.gif" width="468" height="401" alt="STMicroelectronics STLC2690 Bluetooth and FM-Radio Transceiver Block Diagram" border="0"/></a></div>
<p>The combo solution saves space and costs for manufacturers of portable products, while delivering to consumers stereo FM R(B)DS reception (RX) direct to their Bluetooth headsets. The fully integrated short range FM R(B)DS transmitter (TX) allows users to enjoy stored music content on any in-car or home FM radio tuner and delivers increased versatility to the mobile device.</p>
<p>The STLC2690 is compliant with BT v2.1+EDR and further increases the field-proven class-1.5 Bluetooth output power, requiring only one supply voltage and without any calibration in production. The Bluetooth link stability is dramatically increased by also further improving the Bluetooth receiver sensitivity, while reducing the best-in-class current consumption by up to 35% compared to former generation products in 130nm technology.</p>
<p>The integrated FM receiver sets a new world standard for receiver sensitivity and with real-time programmable filters for optimum search and sensitivity stability, the STLC2690 can also be used with integrated FM antennas. The device supports all deployed R(B)DS services and all worldwide FM bands (65 to 108MHz).</p>
<p>The short-range FM transmitter is specifically designed for use in mobile phones that also take advantage of the presence of a FM receiver. Proprietary SureTune(tm) technology automatically selects the optimal FM transmit frequency, while the programmable high output power allows stable operation even when using integrated antennas with poor efficiency. The STLC2690 delivers a stable and user-friendly FM transmission implementation with real enhancement of the user experience in mobile applications.</p>
<p>The new STLC2690 comes in a Wafer Level Chip Scale Package (WLCSP) with a 0.4mm pitch. Its ultra-low external BOM count allows a PCB footprint as small as 36mm2. The pin-out arrangement of the STLC2690 is also suitable for use on low-cost PCB assemblies.</p>
<p>More info: <a href="http://www.st.com/bluetooth">STMicroelectronics Bluetooth ICs and Modules</a></p>
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