Cadence Design Systems Introduces SpeedBridge Adapter for PCIe 3.0

Cadence Design Systems introduced a new SpeedBridge Adapter for PCIe 3.0. The adapter provides easy bring-up and fast debug of PCIe-based designs when used with a Cadence Palladium Verification Computing Platform, and is backwards compatible with PCIe 2.0-, 1.1- and 1.0a-based designs. The Cadence SpeedBridge Adapter for PCIe 3.0 is available now.

Cadence SpeedBridge Adapters Features

  • Reduce risk by emulating the design under real-world system operating conditions
  • Increase productivity by allowing the system emulation environment to run at full speed when connected to an environment
  • Comply with industry-standard communications interconnect specifications
  • Increase emulation efficiency with a universal chassis that accommodates up to six SpeedBridge Adapters
  • Ready-to-use and reusable

The SpeedBridge Adapter is designed for pre-silicon RTL and integration of PCIe-based ASICs and systems-on-chip (SoCs). It enables system emulation under real-world operating conditions. The adapter verifies emulated PCIe 3.0 designs with the actual ASIC or SoC software and hardware, driver and application development, and runs with existing software and software test programs or analyzer.

The SpeedBridge Adapter for PCIe 3.0 reduces time to market and system risk for complex designs by providing high-speed interaction with real-world traffic in a pre-silicon environment running production-level software drivers and an OS.

More info: Cadence SpeedBridge Adapters