Mentor Graphics Debuts MIPI Verification IP for Veloce Hardware Emulation

Mentor Graphics has developed MIPI-protocol verification IP for their latest-generation Veloce hardware emulation platform. The Mentor MIPI VIP solution enables engineers to exhaustively stress test a device-under-test (DUT) that includes one or more MIPI protocol interfaces on their SoC, and run verification cycles at orders of magnitude faster than simulation.

The MIPI-protocol verification IP enables the use of stimuli generated by modern simulation testbenches, including SystemVerilog/UVM, and SystemC-based environments, and applies them to a MIPI-based, design-under-test (DUT) running in the Veloce emulator. Since the connection between the testbench and the VIP is at a transaction-level rather than signal interface, a high level of performance is delivered.

The new MIPI VIP supports users of the MIPI camera and display-based protocols, CSI and DSI, and is compatible with the Questa functional verification platform as well as the Veloce hardware emulation platform.

The new MIPI VIP solutions deliver use modes with traditional, in-circuit emulation (ICE) and high-performance, transaction-based verification or acceleration. When combined with the Questa functional verification platform and the Veloce2 emulator, the MIPI VIP delivers high-performance and easy-to-use system verification solutions for developing SoCs containing MIPI devices, without compromising delivery schedules. The solutions are available for deployment at customer sites effective immediately.

More info: Mentor Graphics Verification IP Solution