AWR Application Note: Design and Optimization of a Board-to-Chip Transition

Design and Optimization of a Board-to-Chip Transition ~ AWR application note

AWR published an application note about the features of Analyst EM Simulator for chip-module-board transitions. The technical paper highlights the features of AWR’s 3D finite element method (FEM) EM simulator by demonstrating the optimization of the transition from a board-to-chip signal path. The article shows how the ability to access Analyst seamlessly from within the Microwave Office environment saves time by eliminating not only the need for the design to be drawn and/or redrawn, but also by providing ready access to additional and powerful features of a circuit design tool such as tuning and optimization.

Design and Optimization of a Board-to-Chip Transition

3D electromagnetic (EM) simulators are commonly used to help design board-to-chip transitions. AWR now makes life easier for circuit designers with the introduction of Analyst, a full featured, 3D EM finite element method (FEM) simulator. The key advantage of Analyst over other available 3D simulators is its tight integration within the Microwave Office design environment, AWR’s circuit design and simulation platform. This application note highlights the unique features of Analyst by demonstrating the optimization of the transition from a board-to-chip signal path. The example shows how the ability to access Analyst from within in the Microwave Office environment saves designers time and provides ready access to powerful layout and simulation tools that are not available in typical circuit design tools.

In this application note, AWR’s Analyst finite element method 3D EM simulator was used to optimize the return loss for a board-to-chip transition. The novel features of Analyst were leveraged to speed up the study. Portions of the layout were simulated by redefining the simulation boundary and ports, without ever needing to manually redraw the structure. Pcells for the layout of the bond wires and BGA balls were used, so that these structures did not need to be manually drawn either. By adding extra internal ports, capacitance could be added to the parts of the transition quickly, and then the values could be tuned and optimized to determine where changes were needed. The preconfigured circuit simulation features in Analyst significantly reduced development time and allows designers to spend more of their time on circuit designs/behavior and less on the nuances of using a 3D EM point tool.

More info: Design and Optimization of a Board-to-Chip Transition (pdf)