The 2013 Design and Verification Conference (DVCon) will feature twelve technical sessions, ten tutorials, a poster session with over twenty posters being presented, and two panels throughout the conference. DVCon is a conference for the discussion of the functional design and verification of electronic systems. The event is sponsored by Accellera Systems Initiative, an independent, not-for profit organization dedicated to creating design and verification standards. VCon will take place February 25 – 28 at the DoubleTree Hotel in San Jose, California.
The first panel, “Where Does Design End and Verification Begin?” will be held on Wednesday beginning at 8:30am in the Oak Ballroom. It will be moderated by Brian Hunter of Cavium, Inc. The Industry Leaders panel will also be held on Wednesday, beginning at 3:30pm in the Oak/Fir Ballroom. Poster sessions will be held on Tuesday from 10:30-11:30am. The DVCon Expo will be open on Tuesday and Wednesday from 3:30-6:30pm.
2013 Design and Verification Conference Topics
- Lessons from the Trenches: Migrating Legacy Verification Environments to UVM
- Increasing Productivity with SystemC in Complex System Design and Verification
- Low Power Design, Verification, and Implementation with IEEE 1801 UPF
- User Experiences at the Forefront of Mixed-Signal Design and Verification
- Deployment of UCIS
- Formal and Semi-Formal Techniques
- The Changing Landscape in Functional Verification – Don’t Get Left Behind
- Verification Process and Resource Management
- System-on-Chip Design and Verification
- Verification Techniques
- Opportunities, Challenges, and Collaboration
- Where Does Design End and Verification Begin?
- ESL and/or TLM
- Hardcore UVM
- Mixed-Signal/Power Aware Design and Verification
- Best Practices in Verification Planning
More info: DVCon 2013