Synopsys Rolls Out Version 12.06 of Virtualizer Tool Set
Synopsys released version 12.06 of their Virtualizer tool set for creating virtual prototypes and Virtualizer Development Kits (VDKs) for accelerating embedded software development. Virtualizer 12.06 release makes it easier for design teams to create virtual prototypes and deploy them to software engineers in VDKs. The new Virtualizer 12.06 release is available now.
Synopsys Virtualizer v12.06 includes a new model authoring feature and IP specification import function. The new tool improves modeling productivity, and enables engineers to develop system-level models and assemble them into virtual prototypes up to three times faster. In addition, the tool offers enhanced support for popular debugger tools that help software developers to easily integrate Virtualizer-based virtual prototypes into existing software debug flows.
The latest release of Virtualizer features a new graphical simulation profiler that makes it easier for virtual prototyping teams to find and address simulation bottlenecks. The tool supports the latest APIs for software debuggers like Lauterbach TRACE32 System and ARM Development Studio 5 (DS-5). In addition, Virtualizer is integrated with MathWorks’ Simulink simulation environment. This enables more rapid deployment of virtual hardware-in-the-loop (HIL) testing.
The model authoring interface in the new Virtualizer tool set simplifies and automates model creation with new features like automatic design rule checking and design-sensitive help. Virtualizer improves modeling productivity for both virtual prototyping experts and those less experienced. The new tool release also enables engineers to import existing IP specifications in popular formats such as IP-XACT, Excel, Word and PDF. This speeds model development by automatically generating SystemC Modeling Library (SCML) constructs and industry-standard Accellera Systems Initiative TLM-2.0 bus interfaces.
In addition to providing improved model creation capabilities, Virtualizer 12.06 release continues to support direct integration of TLM-2.0 standard-based models of common IP blocks readily available in the market. This includes support for Synopsys’ DesignWare TLM Library models, ARM Fast Models, and other SystemC TLM models available from Synopsys. The tool also supports over 900 system-level models that can be found on TLMCentral.
Synopsys Virtualizer v12.06 Highlights
- Enhanced model authoring capability speeds the creation of SystemC-based transaction-level models used to build virtual prototypes
- New import function reduces modeling effort and errors by automating model generation from IP specifications captured in popular formats such as IP-XACT, Excel, Word and PDF
- New simulation profiler quickly identifies execution bottlenecks to enable faster prototype simulation performance
- Deeper integration with popular software debuggers such as ARM Development Studio 5 (DS-5) and Lauterbach TRACE32 System helps identify difficult bugs through multicore and context-aware debugging
More info: Synopsys Virtualizer
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