Carbon Design Systems and Cadence Design Systems Team on Performance Analysis Kit
Carbon Design Systems and Cadence Design Systems announced the availability of a Carbon Performance Analysis Kit. The CPAK accelerates the intellectual property (IP) benchmark process. The Carbon/Cadence CPAK is available now from Carbon’s IP Exchange web portal. Ported CoreMark benchmarking software is available from coremark.org.
The Carbon Performance Analysis Kit features a Cadence double data rate (DDR3) Memory Controller, an ARM Cortex-A9 MPCore processor, industry-standard benchmarks (such as those from EEMBC), and configurable models for the interconnect fabric, DDR3 memory and memory PHY. In addition, multiple configurable traffic generators are included as producers and consumers to model additional bus traffic. The CPAK executes in Carbon’s SoC Designer Plus virtual prototype environment.
Optimization of the processor to memory datapath plays a key role in the development of many leading-edge SoCs. The new Performance Analysis Kit enables engineers to be more productive by benchmarking the same day they download the package from Carbon IP Exchange. The CPAK bypasses any traditional setup issues and helps engineers to be productive immediately.
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