Open Core Protocol International Partnership (OCP-IP) released the latest version of the OCP Modeling Kit. Version 2_2x2_2 of the kit features greater robustness of data in payload event queues, a modification of thread-busy signaling API, added support for interrupts, sideband error signaling, sideband user flags, added TLM2-native adapters between TL3 and TL1, and added TLM2-native adapters between TL1 and RTL signals (TL0).
Version 2_2x2_2 of the OCP Modeling Kit continues to support and leverage Accellera Systems Initiative SystemC TLM-2 for all levels of abstraction and includes TL4, which is equivalent to Accellera’s loosely-timed (LT) level. TL1 is fully cycle-accurate, including support for clock cycle synchronization and combinatorial paths. TL2 handles intra-burst timing. TL3 and TL4: inter-burst or no timing, equivalent to Accellera’s Base Protocol.
The OCP Modeling Kit includes everything needed for immediate use and is free to OCP-IP members. It saves engineers hundreds of thousands of dollars each year in development, documentation, and training costs by enabling them to model their bus fabric to leverage this OCP-IP SLD modeling kit. A fully functional version of the kit without monitors is also available to non-members.
The OCP Modeling Kit was developed by OCP-IP member companies working with Greensocs. It interoperates seamlessly with other TLM utilities, such as GreenSocket from GreenSocs. The work by OCP-IP’s System Level Design Working Group ensures continued alignment with the Accellera Systems Initiative SystemC TLM-2 standard and is the most advanced TLM-2 based, industry-ready kit in existence today.
More info: OCP-IP